Electronic Design

Regenerative Current Transformation Delivers Sub-Volt Regulated Output

Regenerative topologies and systems have been explored extensively in regards to providing regenerative loads for burn-in systems,1 enabling efficient burn-in of power supplies. Regenerative burnin systems are desirable, as the power supply ideally functions as both source and load. This means a substantial energy savings (up to 90%) when attempting to provide a burn-in function.

For example, in a non-regenerative burn-in system, a 100-A, 100-W dc-dc supply will need a 100-A, 100-W load for burn-in (a 100-W bank of resistors). Let’s also assume in this example that the supply is 90% efficient. The total amount of energy used in the burn-in process is 110 W (100- W load plus 10-W power-supply losses). The regenerative version of this system, rather than powering a load, converts the load current back to the initial voltage and returns it to the input. In this case, the power used in the system is equal to the power dissipation of the device-under-test (DUT) supply plus the dissipation of the regenerative dc-dc converter.

Thus in our example, the supply still provides 100 A and dissipates 10 W, but a second supply back to the input converts the 100 A. Let’s say the regenerative supply was 80% efficient. Now the total losses would be 30 W (10-W supply + 20 W in the regenerative supply). This reduces energy by 72% compared to the first system.

A second example of energy recovery and regenerative circuitry comes from topologies that utilize subcircuits to recover primary (or secondary) circulating currents and return some of that energy back to the input instead of dissipating it in magnetics, snubbers, or switching losses.2 Energy is saved here as well, along with the additional benefit of increased power-converter efficiency.

This circuit was designed to enable a 48-V to sub-volt conversion, where duty cycle and outputrange limitations would normally not allow for low voltage with regulation. It’s intended to provide a wide-range capability for testing microprocessors as part of an automated-test-equipment (ATE) system. An alternative approach would be to provide 48 to 0.8 V regulated,3 with a linear post-regulation stage to 0.5 V. However, at high currents (up to 300 A), the additional losses would come close to 90 W total. The proposed solution dissipates an additional 45 W at 300 A.

The design uses three V•I chip modules:

• The bus converter (BCM-U4) is a compact and efficient 48-V input step-down converter.
• Downstream, a power regulator (PRM-U2) is an isolated zero-voltage switching (ZVS) buck-boost regulator that can operate with input voltages from 1.5 to 400 V and can step up or step down over a 5:1 range with a conversion efficiency up to 98%.
• The isolated dc transformer (VTM-U3) is essentially a non-isolated current transformer, used at the point of load. For input conditioning, U1 is a multi-amplifier chip that provides:
• Differential-sense at the point of load with 80-dB common-mode rejection capability
• Error-amplifier functionality with closed-loop regulation bandwidth of up to 100 kHz
• A buffer stage for analog reference input from the system

It should also be noted that the Load terminal is tied directly to the –IN terminal of U2 and designated as ground. No other minus terminals are connected to ground.

Feedback from the isolated dc transformer (VTM) to the upstream regulator (PRM) is used to perform load regulation. As a current transformer, the VTM multiplies the current (and divides the voltage) by a “K” factor. This takes place with essentially a 100% transformation duty cycle; therefore, there’s no loss of efficiency at high values of K. Consequently, the bus voltage provided by the bus converter module (BCM) can be greater than 12 V. In fact, it’s limited only by safety concerns.

Bulk capacitance at the VTM input reflects itself at the point of load with a gain equal to the square of the VTM current gain, K. Only very small amounts of ceramic bypass capacitance, effective over a short time scale of less than a microsecond, are needed at the load. This approach also allows precise control of the load voltage through the isolation barrier without long, noise-sensitive feedback lines or optocouplers.

CONFIGURATION
The circuit is designed to provide a regulated 0.5 V (or lower) output from a 48-V, ±10% input (see the figure and table). U2 and U3 provide a regulated 48- to 2.5-V output. U2 provides a regulated 40-V rail from the 48-V input.4 U3 is an isolated dc transformer that provides a 2.5-V output proportional to the input by a factor of 1/16.5 This factor is henceforth referred to as K1.

As can be observed from the circuit, the output of U4 is connected in series opposing the output of U3.6 U4 is a second isolated dc transformer that provides an output proportional to its input by a factor of 1/32. This factor is henceforth referred to as K2. U4 is essentially the device that provides the regenerative function in the circuit.

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U3 and U4 both utilize bidirectional topologies,7 so the current flow through U4 is actually in reverse, flowing into the device through the +OUT pin and out of the +IN pin. Equation 1 shows the relationship between input and output voltages.

VLOAD = VOUT+_U2 × K1 - VIN × K2
(1)

The current flowing into U4 is returned to the input and re-circulated through the U2-U3 combination. This is governed by the following equations:

ILOAD = IOUT+_U4 = -IOUT+_U3
(2)


IIN+_U4 = (-IOUT+_U4) × K2 - Iq
(3)

Equation 3 introduces Iq, which is a dc current term that’s absorbed by U4 and not recovered. The same term also exists for U3, as shown below. To simplify these equations, it’s assumed they are equal. In practice, though, they are within 10% of each other.

IIN+_U3 = -IOUT+_U4 × K - Iq (4)

Since K1 > K2, then |IIN+_U4 | < |IIN+_U3 |, meaning that the regenerated current will always be slightly less than the forward current— through U3. This allows for the regenerative function to be essentially unregulated. The regenerated current is always slightly less than the forward current, so it essentially feeds directly back into the forward supply. The power contribution from the source (48 VIN) is now equal to the power dissipated in the forward and regenerative supplies only (U2, U3, and U4).

But what about the input to U2? This PRM is a regulated device and thus exhibits negative impedance. An increase in VIN_U2 leads to a proportional decrease in IIN_U2. However, an increase in VIN also leads to a boost in VOUT+ of U4, proportional by K2. Because the output is regulated, VOUT_U3 must decrease accordingly. Again, U3 output and input are proportional, and with the decrease in U3IN, IIN_U2 decreases. Consequently, there’s no situation in which IIN_U2 < IIN_U4, which would require the source to sink current to remain stable.

Another system requirement is that the load should have extremely low impedance with a fast transient response. Both U3 and U4 feature low impedance over a wide frequency (from dc to ~700 kHz).3 However, since U4 is running in reverse with the output appearing in series, the input impedance must be low as well, or else the regulated output in the totem pole (U3) won’t be able to regulate the output. Even with low impedance, the input impedance to U2 must also be low so it can quickly use energy returned to the input in the event of a sharp decrease in load (in which the output voltage rises above the set point until the control can adjust).

ICs U2, U3, and U4 switch at non-synchronized frequencies greater than 1 MHz. Because the frequencies are dissonant, capacitive filtering of each separate output is necessary to reduce or eliminate low-frequency beats occurring at the various node points of the three converters. Filtering the high frequencies individually also saves on filter size as compared to filtering the beats using additional load capacitance.

Disabling U4 and providing a FET bypass across its output would enable the system to achieve voltages greater than 1.5 V. As a complete system, the total range of this supply is 0.1 to 3.1 V and is essentially limited by the output range of U2 (26 to 55 V).

CONCLUSION
The regenerative features of the system enable higher efficiency versus multi-stage approaches (48 to 12 V, –3 to 0.5 V) or single-stage approaches with a linear post-regulation stage. A customized control loop is used to enable fast dynamic response with minimum voltage deviation and good stability over the whole output range.

The application of such a system is twofold. First, it can effectively replace a linear post-regulation stage for an extremely low-voltage input supply and provide a substantial boost in efficiency by regenerating the power normally dissipated in the linear stage. Second, the regenerative component in the system (U4) could be used to implement a burn-in system for a current regulated supply (e.g., U2 and U3) that doesn’t require a dissipative load and instead re-circulates the current back to the input.

References
1. O’Sullivan, B., Morrison, R., Egan, M.G., Slowey, J., Barry, B., “A Regenerative Load System For The Test Of Intel VRM 9.1 Compliant Modules,” APEC Conference 2004 Proceedings
2. Lee, D.Y., Kim, W.S., Cho, B.H., “A Novel DC-DC Full-Bridge Converter using Energy-Recovery Circuit with Regenerative Transformer,” APEC Conference 2005 Proceedings
3. Yeaman, Paul, “High Current Low Voltage Solution For Microprocessor Applications from 48V Input,” PCIM 2007 Proceedings
4. Vicor V•I Chip PRM P048F048T24AL Datasheet; www.vicorpower.com/documents/datasheets/48V_48V_240W_PRM.pdf
5. Vicor V•I Chip VTM V048F030T070 Datasheet; www.vicorpower.com/documents/datasheets/48V_3V0_70A_VTM.pdf
6. Vicor V•I Chip BCM B048F015T14 Datasheet; www.vicorpower.com/documents/datasheets/48V_1V5_140W_BCM.pdf
7. Vinciarelli, P., “Factorized power architecture with point of load sine amplitude converters,” U.S. Patent 6,930,893

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