Designers frequently use special circuits to reduce the power required to hold a relay in the latched position. Analog circuits such as the "brute force" resistor-capacitor solution or the time-variable current sink tend to be very bulky or waste energy in the pass-transistor.
The simple and small digital circuit shown in the figure energizes a relay coil at full power for the time required for reliable latch. It then automatically reduces the coil current by 50% to maintain the latched state at reduced power.
At the heart of the circuit lies a Texas Instruments SN74LVC1G97 Schmitt-input multifunction gate (I1) configured as a dual-gated oscillator. When the relay control signal (RLY_SIG) is low, the oscillator output (OSC) is low and the relay coil is off. When RLY_SIG goes high, C1 drives IN0 high.
This forces the output high for approximately 100 ms, which is plenty of time for most relays or solenoids to latch fully. If a longer latch time is required, increase the value of R1.
After the latch time, I1 functions as a 50% duty-cycle oscillator as long as RLY_SIG remains high. R2 and C2 set the oscillator frequency. With the values shown, the oscillator runs at about 42 kHz.
A dc relay coil will stay latched at this frequency because the induced current flowing through the coil and D1 holds up the magnetic field during the off time. Current draw on the +5-V supply is about 10 mA when oscillating and 5 μA when stopped.
Using the designated parts, coil voltages of up to 60 V (V_RLY) and coil currents of 500 mA can be accommodated with a wide safety margin. If greater coil current or voltage is required, select a transistor with a higher drain current and/or voltage rating.
Watch out for the ratings of the freewheeling diode (D1), because it's essential in this pulse-width-modulated circuit. The reverse voltage rating of D1 must be greater than the relay supply voltage, and its current rating should equal the steady-state coil current.