Electronic Design

Two Bipolar Transistors Form A Low-Cost Solar-Array Emulator

Polar-array systems are becoming a very important energy source. Today, they're being used in numerous applications where mains power isn't available or clean energy generation is preferred.

To determine the electrical and physical characteristics of the whole system, it's a good idea to use an experimental setup. It comes in handy when defining the solar-panel model and checking the power-conditioning system while its main parameters are varied.

The circuit presented here can be used as a very low-cost circuit for testing purposes. This eliminates the need for commercial solar emulators, which are expensive, not very common, and used only in specific areas.

The I-V characteristic of a solar panel can be mathematically modeled by Equation 1 as a current source with two independent terms. An ideal constant current appears in the low-voltage regime, and an exponential term dominates the high-voltage region, keeping the current in the panel low.

In equation 1, ISA is the solar-array current, ISC is the short-circuit current, IS is the saturation current, A is the shaping factor, and VSA is the solar-array voltage.

Figure 1 depicts a simple circuit topology for solar-panel modeling, with three variable resistors that permit adjusting for the most important parameters: R1 for ISC, R2 for series resistance, and R3 for the voltage at the maximum power point, VMPP. Figure 2 shows an I-V experimental curve obtained from a small prototype.

The circuit implements an equivalent current source using two transistors and a diode, which actually form a circuit with two topological states. Q1 forms a constant-current source that defines ISC, and Q2 is used to subtract an exponential term of the current when the solar-array voltage goes beyond VMPP, as shown in Figure 2. Finally, diode D protects Q2 for high reverse voltage in the emitter-base junction and models the effect of current decrease in the flat region (Fig. 2, again).

In the first operating region, Q1 is working in its linear region, whereas Q2 is off and diode D is on. Under these conditions, ISA is given by:

VTH2 and RTH2 are deduced from the Thevenin equivalent circuit in the base of Q2, VB1 is the base voltage in Q1, and VEB1 is the emitter-base voltage in Q2.

When the voltage increases in the solar array, diode D is blocked and Q2 starts to drive current from a starting point that's fixed by the VTH2 voltage. Assuming the Ebers-Moll model for a bipolar transistor, the current in that region is given by:

In Equation 3, IES2 is the inverse saturation current of the emitter-base junction, and VEB2 is Q2's emitter-base voltage. Also, R2, which can be used to adjust the slope of the I-V characteristic, represents the series resistor that appears in a more complex solar-cell model.

Voltage at the solar-panel's maximum power point is easily deduced by:

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