Curtiss-Wright Corp.’s Defense Solution division began shipping early access units of its CHAMP-FX4 module—a commercial off-the-shelf (COTS) 6U FPGA engine. According to the company, the ruggedized OpenVPX (VITA 65) board is the first 6U FPGA engine to feature triple on-board Xilinx Virtex-7 devices (585T or X690T) in an FFG1761 package. Two of the Virtex-7 FPGAs serve as I/O FPGAs, and are connected to FMC (VITA 57) mezzanine sites and to the backplane SerDes. The other FPGA is the board’s “aggregator” FPGA, and is connected to the Backplane Expansion Plane. Curtiss-Wright also announced successful demonstration of the module’s 18 on-board FPGA SerDes and all 40 backplane FPGA SerDes running at 10.3 Gbits/s in both directions simultaneously with no bit errors. The results validate the high-speed design rules used for the CHAMP-FX4, while also demonstrating the movement of >1 Tbit/s. Such I/O performance, combined with on-board memory bandwidth that approaches 1-Tbit/s data rates, achieves the 1-Tbit/s speed. Use of the high-DSP-density Xilinx FPGAs results in a total of 10,800 DSP48E hard macros. The DSP blocks provide over 3 TFLOPS of digital signal processing. Applications include radar processing, SIGINT, ISR, image processing, C4ISR platforms (e.g. digital beam formers, digital receivers), and others.