FPGA Mezzanine Cards Ups The Speed Ante For DAQ

FPGA Mezzanine Cards Ups The Speed Ante For DAQ

Two new FPGA mezzanine cards from 4DSP further accelerate data acquisition and generation in embedded applications. The FMC160 has one 12-bit, 3.6-Gsample/s analog-to-digital channel and one 14-bit, 5.6-Gsample/s (2.8-Gsample/s direct RF synthesis) digital-to-analog channel clocked by either an internal clock source (optionally locked to an external reference) or externally supplied sample clock. Its design is based on Texas Instruments’ ADC12D1800 analog-to-digital converter (ADC) and Analog Devices’ AD9129 digital-to-analog converter (DAC). The FMC161 contains one 12-bit, 3.6-Gsample/s analog-to-digital channel or two 1.8-Gsample/s analog-to-digital channels clocked by either an internal clock source (optionally locked to an external reference) or externally supplied sample clock. Its design is based on TI’s ADC12D1800 ADC. Both daughtercards come with a high-pin-count connector and front-panel I/O. They can be used in a conduction-cooled environment, and are mechanically and electrically compliant to FMC (ANSI/VITA 57.1).

4DSP

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