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FPGA Software Achieves Rapid Timing Closure

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The LeonardoSpectrum 2000 FPGA design software incorporates TimeCloser technology that claims to be the industry's first synthesis tool to enable timing optimization based on accurate, physical data. A unique second-pass optimization algorithm closely integrates synthesis and place-and-route data.
The application also includes Xilinx's floorplanner interface and new bi-directional place-and-route interfaces for Actel, Altera and Xilinx programmable devices. The new interfaces are designed to enable the software to read physical place-and-route data. Running on Windows 95/98/NT/2000, Solaris and HP-UX , platforms, pricing starts at $17,500.

TAGS: Digital ICs
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