Working closely with Renesas Electronics, Symtavision has developed an integrated, model- and trace-based methodology for the Renesas RH850 family of multicore MCUs as well as other Renesas target MCU architectures.
Central to the new integrated methodology for multicore MCUs is Symtavision’s SymTA/S tool suite for model-based timing analysis, optimization, and synthesis, combined with Symtavision’s TraceAnalyzer solution for visualizing and analyzing timing from measurements and simulations.
The methodology involves target tracing to gather fundamental timing data in a realistic environment on the target platform (or one that is predictably related). Symtavision’s TraceAnalyzer then processes this data to visualize and validate the internal scheduling of the device and derive key metrics such as memory access times, runnable execution times, and patterns of sporadic interrupts. This allows the simple creation of dedicated RH850 virtual performance models in SymTA/S. These models facilitate an early assessment of design alternatives to ensure that all software can execute in real-time and also provide a basis for the continuous validation of model assumptions versus actual implementation. The models can be extended seamlessly to analysis of distributed functions over CAN, Ethernet, FlexRay, or LIN.