This year's 11th annual IEEE International Interconnect Technology Conference will focus more deeply on 3D issues to better align its technical program with the interconnect needs of the semiconductor and photonics industries. "We have had 3D papers at IITC previously, but they were scattered throughout the program," Michael Shapiro, IITC 2008 Publicity Chair and Chief Engineer for 3D Development at IBM, said in a statement. "This year, we will have at least one whole session devoted to 3D, along with two invited speakers addressing important aspects of the topic." Conference-goers can expect an extended breadth of papers on topics like 3D structures and techniques, process modeling, back-end materials and unit processes associated with interconnect technology, and manufacturing issues. Conference organizers have put out a call for papers on 3D-related topics. The deadline is Feb. 1. "Our desire is to attract papers focusing on 3D silicon processes as opposed to packaging," Shapiro said. Traditional integration-focused IITC papers, however, are still welcome and important, he said. The conference, which will be held from June 1-4 at the San Francisco Airport Hyatt Regency Hotel, brings together the world’s leading experts on the interconnections within and among computer chips for three days of technical presentations. Starting in 2009, the IITC will begin rotating among locations in Asia, Europe and the U.S. For additional information and submission guidelines, go to www.ieee.org/conference/iitc.