Electronic Design

OIF Okays Faster, Scalable Packet Interface

With scalability from 6 Gbits/s to hundreds of gigabits per second, the SPI-S (Scalable System Packet Interface) is ready for immediate deployment, now that the implementation agreement has been finalized by the Optical Internetworking Forum (OIF). SPI-S is a successor to the widely deployed OIF SPI 4.2 interface, leveraging the Forum's Common Electrical Interface (CEI) to take advantage of high-rate serial physical interconnects. The new interface is specified to run over CEI, which is defined at 6 and 11 Gbits/s for both short- and long-reach applications. SPI-S can also be used with other physical interconnects, including the OIF's SxI-5. In addition, the OIF recently initiated a CEI-25 project to extend the CEI into the 25-Gbit/s range. SPI-S will be able to take advantage of CEI-25 once it is fully defined.

SPI-S uses either industry-standard 64B66B framing or, optionally, the enhanced OIF CEI Protocol (CEI-P) framing, which provides forward error correction (FEC) support, yet retains a 64/66 clock ratio. FEC is likely to be useful when 11-Gbit/s PHYs are used in backplane applications and when future, higher-speed PHYs are employed. SPI-S also retains the high-availability focus of the SPI family of interfaces. Like those other protocols, SPI-S is defined to be self-recovering from a catastrophic event on its interface, such as a protective switchover of a card. The SPI-S implementation agreement is available to the public at www.oiforum.com/public/documents/OIF-SPI-S-01.0.pdf.

TAGS: Components
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