Packaging MEMS devices is a very challenging task that poses problems distinct from conventional ICs. Among the complexities is the need for protection from particulate contamination, moisture, ESD, and thermal effects. In addition, there are electrical performance limitations caused by parasitics. Other challenges include the interaction of a MEMS device with outside chemical, mechanical, optical, electrical, and other measurands. This is particularly true for MEMS devices used in RF and inertial applications, where the cost of packaging can account for as much as 85% of the device's overall costs.
MicroAssembly Technologies Inc., Redmond, Calif., is pro-posing a novel solution to these issues. The idea involves the use of a wafer-to-wafer transfer of micromachined devices and metallurgical bonding (Fig. 1). It also fits in with the recent move from die-scale to wafer-scale packaging for low-cost, high-performance advantages.
At last year's The Commercialization of MEMS 2000 Conference in Santa Fe, N.M., Michael B. Cohn, MicroAssembly Technologies' CEO, discussed several commercially available MEMS devices. He also described ways in which some improvements could be achieved through a new packaging approach.
Specifically, MEMS manufacturers constantly wrestle with the problems of acceptable yields, packaging cost, and the integration of a MEMS device with other electronics. Cohn proposes that his technique can solve these problems. A solution is important, he emphasizes, since next-generation wireless, fiber-optic, and sensor components will require not only improved performance, but also more economical packaging.
A Pillbox Process
Key to the new way of packaging is a wafer-scale approach, wherein a MEMS donor wafer with micromachined structures is bonded to another target wafer and the two are later separated. This "pillbox" method potentially lets complex fabrication processes be decomposed into independently optimized and simple modules. In fact, the company has demonstrated this development on vacuum-packed microresonators with as few as three masking steps.
Since it relies on the wafer-scale method, this approach offers a lower-cost and higher-yield solution than other procedures. It uses a narrow seal ring to provide a reduced footprint, and low-parasitic interconnects to improve frequency response and noise performance. On some conventional packages, a wire-bond pad can measure roughly 10 times the size of the active MEMS device. This results in parasitics that attenuate the output by 100 times. Furthermore, because it is a two-chip technique, the process also allows the use of high-Q passive components not normally possible with a single-chip method (Fig. 2)
Lid structures are first fabricated in 4-µm polysilicon atop a polysilicon-glass (PSG) sacrificial layer (Fig. 1, again). Micromachined breakaway tethers hold the lids in place on the donor substrate after being released in a 49% hydrogen-fluoride solution. Solder microbumps patterned on the polysilicon enable bonding and transfer to a target substrate. Next, the lids are sealed onto the target substrate using a narrow seal ring for hermeticity. Vacuum seals have been demonstrated, and the structures have survived autoclaving and 1000 lbs/in.2 of pressure without damage. A number of microactuators have already been transferred from donor to target substrates in a batch fashion.
'The next step is to align both donor and target substrates and compress them at room temperature. Then the substrates are released apart, at which point they sever at the polysilicon tethers. Through this action, a compression bond is formed for a cold weld with the target substrate, and it adheres to the target.
Successful transfers have been made to standard CMOS dice. Several tether designs have been implemented to act as strain-relief structures during the transfer process. This is important, because for very sensitive structures, compliant tethers are needed to prevent structure buckling or warping during compression.
A typical design consists of a thin polysilicon beam attached to the main structure. This beam is attached to the substrate by a micromachined anchor. During the transfer process, the beam fractures, leaving the anchor behind on the donor substrate. Consequently, the released structure is free to transfer onto the target substrate.
Very little surface preparation is required, nor is there a need for smooth gold surfaces (surface roughness can be within ±2 µm). In essence, the process acts as a universal "glue layer," in the sense that it can be used to bring together very disparate technologies, such as MEMS and CMOS, and make them perform in a monolithic fashion. The technique can be used with foundry-manufactured ASICs, as well as off-the-shelf ICs. The capability to provide very small electrical contacts eliminates the bond-pad parasitics seen in conventional packaging.
Another important feature of the wafer-transfer method is that it's relatively insensitive to particulates or imperfections that are up to 1 µm in size.
Because it's a hybrid technique, the wafer-transfer procedure enables a wide variety of electronic functions to be packaged with many different MEMS devices, including switches, multiplexers, filters, amplifiers, and so on (Fig. 3). Using multiple transfers permits multilevel complex devices to be constructed and allows devices to be assembled by other very different devices. It also makes it possible to achieve room-temperature hybridization of structures.
One promising area of application lies in the RF domain. Since the two-wafer process provides simplified device designs and manufacturing processes, additional freedom in the selection of materials, lower insertion loss, and greater isolation appear possible in devices such as RF switches and filters.
Wireless MEMS applications, particularly for cell phones, are projected to be huge markets. Some estimates are placing the market at over $10 billion by 2005.
For more information, contact MicroAssembly Technologies at (510) 758-2600, or visit the company's Web site at www.microassembly.com.