Electronic Design

Wafer-Level Chip-Scale Package Favors Small-Form-Factor ASICs

A fully qualified, high-performance, low-power and small-form-factor wafer-level chip-scale package (W-CSP) developed by Oki Semiconductor satisfies a wide range of ASIC design demands. Targeting chip sizes from 2 by 2 mm up to 8 by 8 mm with pin counts up to 250 pins, it's available in BGA- and LGA-type styles.

According to the company, the package has the same pin count of other packages, yet it's half the size of a fine-pitch BGA package and one-fourth the size of a fine-pitch QFP package. Also, it weighs just one-fourth as much as a BGA and one-tenth as much as a QFP. An 8- by 8-mm package weighs just 0.08 g. And, the lead time is 30% shorter than the lead time for conventional packages.

The W-CSP is made of a molded halogen-free resin with a thickness as small as 0.4 mm. Oki claims that the package has a reliability rating that's as reliable, if not moreso, than conventional packages. It has passed JEDEC Level 1 moisture sensitivity levels, eliminating the need for a dry pack. Pin pitches of 0.8, 0.65, 0.5, 0.4, and 0.3 mm are available. Lead-free solder is optional.

The W-CSP is available with a lead time of 10 to 14 days for trial production runs and volume production quantities. Pricing will range from $0.45 to $0.75 per pin.

Oki Semiconductor
www.okisemic.com/us
(408) 720-1918

See associated figure.

TAGS: Components
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