Electronic Design

Up-And-Comers Threaten Flash Memory’s Supremacy

As the decade closes, the major battleground in memory technology lies squarely with nonvolatile (NV) devices. Even as flash—the king of NV memory—continues adapting to increase its utility, challengers based on magnetic and anti-fuse technologies are rising to wrest away a growing number of applications. At the same time, market forces are eroding the profitability needed to fund further flash technology developments.

Despite its limitations, flash is the dominant nonvolatile-memory technology in both system and system-on-a-chip (SoC) designs. The industry addressed the cost and endurance issues by improving process technology and implementing wear-leveling algorithms. Designers have learned how to work around the relatively slow erase and write speeds when using flash for working system memory, and they’ve massively adopted flash for read-intensive applications such as program and parameter storage.

Flash is poised to continue increasing its dominance by taking over applications currently served by other NV technologies such as EEPROM. For instance, Silicon Storage Technology (SST) recently developed a serial quad I/O (SQI) NOR flash family that challenges serial EEPROM for configuration storage while providing a low-pin-count alternative to byte-wide flash for code storage.

Introduced in 2008 at 16-Mbit density, the 26VF016 SQI device will ramp to production early this year with density increases quickly following. According to Douglas Lee, SST’s vice president for memory products, the company expects to sample 32-Mbit devices in the first quarter of 2009 and 64-Mbit devices by the middle of the year.

Interface Expands Flash Applications
The SQI architecture helps address a growing trend suffered by high-integration processors regarding pad-limited I/O. With their four-pin multiplexed serial data interface, SQI devices make it possible to reduce the memory bus to six lines (Fig. 1). This reduction doesn’t compromise memory bandwidth, however. The devices can operate at clock rates to 80 MHz and offer a continuous burst read at more than 300 Mbytes/s—fast enough for processors to execute code in place and eliminate the need for buffer memory.

Flash memory is also becoming increasingly available with interfaces that allow it to replace hard-disk drives as system mass storage. According to Tahir Husain, manager for Internet computing at SST, using a solid-state drive instead of a memory card for mass storage helps eliminate the need for redesign as higher-capacity flash devices become available. Hussain notes that memory controllers often lag in their ability to handle density increases.

The NANDrive, though, is available in pin-compatible solid-state drives with memory capacity in a range from 128 Mbytes to 8 Gbytes. The company expects to introduce a 16-Gbyte product in 2009. 

But despite such adaptations to expand their market, flash memory will face increasing threats to its dominance in the coming months. Analyst firm IC Insights says that reduced demand due to economic conditions and excess fabrication capacity are eroding flash prices. ABI Research also notes price erosion, predicting a 60% drop in average sales price (ASP) per megabyte. The resulting profitability reduction is creating upheaval in the industry, which may result in vendors pulling out of the market or being absorbed by larger rivals.

Flash memory is also seeing competition from rising new technologies. In applications where memory is seldom written to more than once, such as code or archive data storage, anti-fuse technologies are becoming significant alternatives. One reason is the high level of data security provided by anti-fuse memory.

According to Jim Lipman, marketing director at memory IP developer Sidense, most of the developers the company surveyed indicated that data security is a significant concern. Lipman stated that code intellectual property and digital-rights-management keys for stored media are two areas where data security is of particular importance.

Competing NV Technologies emerge
Anti-fuse memory is more secure than flash because of the extreme difficulty in extracting the programming pattern from an anti-fuse device. Electronic scanning can non-destructively identify the charge state of flash-memory cells, giving software pirates an opening they can exploit. Anti-fuse memory, on the other hand, will not yield its secrets without destructive vertical etching to expose the programmed links, a method that’s expensive, time consuming, and error-prone.

The main applications for anti-fuse memory technology, however, are as a replacement for flash in on-chip storage rather than in standalone devices. As an embedded memory, anti-fuse technology holds several advantages over flash, including reliable data retention at high temperatures and scalability to advanced semiconductor processes. Embedded flash, according to Lipman, is typically a generation or two behind the state-of-the art in process technology.

A rising technology that threatens to one day replace flash as the dominant NV memory for both embedded and standalone applications uses magnetism rather than charges or fuses to store information. Magnetic RAM (MRAM) has been slow getting off the ground, but has now entered the market and will become increasingly available in the next year and beyond.

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Several companies have active MRAM development efforts in place, and at least one—Everspin Technologies, spun out of Freescale Semiconductor in mid-2008—is delivering product. According to Everspin chief operating officer Saied Tehrani, the company achieved production of 1-, 2-, and 4-Mbit MRAM devices and will offer a 16-Mbit device this year.

The interest in MRAM stems from its ability to provide all of the advantages of flash memory with none of its drawbacks. Like flash, the MRAM memory cell needs only a single transistor for each storage bit (Fig. 2). This structure means that MRAM may ultimately achieve storage densities (and thus pricing) comparable to DRAM.

Yet unlike flash, MRAM doesn’t require special handling. Flash memory needs to be erased before being written to, and erasure is a slow process compared to simply reading the data. This disparity in read and write timing complicates the interface. Further, the erasure and write process strain the memory cell’s internal structures, leading to wearout and ultimate failure.

MRAM has no such restrictions. Read and write operations have essentially the same timing and are fast enough for MRAM to serve in applications now utilizing SRAM. The magnetic storage material has no known wearout mechanism, so endurance isn’t an issue.

Unified Memory Architectures Possible
By providing DRAM density with SRAM speed and interface simplicity on top of reliable nonvolatile data storage, MRAM has the potential to unify memory architectures in system designs. Currently, developers use SRAM for high speed, flash for storage, and DRAM for high-capacity working memory.

MRAM can replace all three, giving system designers the freedom to allocate memory at will rather than be constrained to using blocks of each type in sizes set by chip availability. A design calling for 10 Mbytes of working memory and 6 Mbytes of NV storage could use a 16-Mbyte MRAM instead of needing 16 Mbytes of DRAM and 8 Mbytes of flash.

Such a high-density MRAM is still a somewhat distant dream, though. Everspin’s Tehrani noted that, although it’s advancing rapidly, the technology is only at its earliest stages. As a result, bit densities lag behind flash and pricing is still premium. Applications that need nonvolatility at SRAM speed, though, may find it a cost-effective alternative to battery-backed SRAM or flash combined with SRAM caches.

Still, the concept of a universal memory has strong appeal. In fact, it’s the driving force behind work underway at Renesas in embedding MRAM on microcontrollers (MCUs). According to Dave Cocca, director of MCU applications engineering at Renesas Technology America, MRAM is on track for replacing both SRAM and flash in embedded applications over time. For the near future, Renesas has demonstrated MRAM-based designs working at 100 MHz in a 130-nm process, and will be sampling customer-specific products by the end of 2009.

As higher densities of MRAM become available, its application base will expand, eroding the position of flash as the king of NV memory. But the king is not dead yet, nor even ill. Yet future analysis may show that 2009 marked the zenith of flash’s reign as declining profits, market upheaval, and rising technologies continue to exact their toll.

TAGS: Digital ICs
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