Three new support chips have been developed for use with double data rate (DDR) SDRAM memory modules- DDR SDRAMs are differentially clocked and include an on-chip DLL and SSTL_2 interface that permit a peak bus bandwidth of more than double that available on 100-MHz SDRAMs. The first of the DDR support chips to be sampled by the firm is the SSTL 16857, a 14-bit SSTL_2 registered driver with differential clocks housed in a 48-pin TSSOP package. With a typical DDR memory module requiring from 23 to 27 registered control and address lines, two SSTL 16857 devices are required on each memory module card. And in order to synchronize signals on the individual memory chips, a PCK857 PLL is also required on each memory module. The PCK857 is a 150-MHz differential 1:10 SDRAM clock driver in a 48-pin TSSOP package. Also available to DIMM vendors are memory interfaces for industry standard SDRAM technologies, such as PC-100 and PC-133.
Company: PHILIPS SEMICONDUCTORS INC.
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