Samsung Develops Efficient DRAM Stacking Process

Oct. 8, 2008
Deemed the first all-DRAM stacked memory package using through silicon via (TSV) technology, the company's wafer-level-processed stacked package (WSP) consists of four 512-Mb DDR2 DRAM chips that offer 2 Gb of combined memory. The process forecasts

Deemed the first all-DRAM stacked memory package using through silicon via (TSV) technology, the company's wafer-level-processed stacked package (WSP) consists of four 512-Mb DDR2 DRAM chips that offer 2 Gb of combined memory. The process forecasts memory packages that are faster, smaller, and consume less power. For example, using the TSV 2-Gb DRAMs, the company can create a 4-GB DIMM based on advanced WSP technology. The proprietary WSP technology not only reduces the overall package size, but also allows the chips to operate faster and use less power. Inside the WSP, the TSV is housed within an aluminum pad to escape the performance slow-down effect caused by the redistribution layer. SAMSUNG ELECTRONICS CO. LTD., San Jose, CA. (408) 544-4000.

Company: SAMSUNG ELECTRONICS CO. LTD.

Product URL: Click here for more information

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