Electronic Design

Microcontroller Targets High-Speed Communications

Freescale’s 45-nm SOI-based MPC8569E multicore microcontroller incorporates intelligent peripherals to target high-speed communications applications such as gateways and wireless infrastructure. The chip’s primary core is the 1.3-GHz e500-based Power architecture core with a 512-kbyte L2 cache and double-precision floating-point support. This is complemented with four QUICC engine RISC processors that handle communication peripherals up to four Gigabit Ethernet connections, eight RMII, or 16 T1/E1 channels. There are also dual SGMII interfaces or x1 Serial RapidIO interfaces. The built-in security engine handles line-speed encryption of standard protocols such as 3DES, AES, ARC4, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi, and SNOW. Other peripherals include a 64-bit or dual 32-bit DDR2/3 memory interface, a 16-bit local bus, a four-channel direct memory access (DMA), and a USB 2.0 Full Speed interface. I/O pins support a transfer rate of up to 800 Mbits/s. The chip draws less than 10 W at 1.3 GHz and under 7 W at 800 MHz.

FREESCALE

www.freescale.com

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