Fabbed using a 0.1-µm, low-k copper process, the RM9000x2 64-bit, MIPS-based dual processor employs the Linux OS and draws less than 10W of total power with each processor running at 1 GHz. The device integrates multiple bus interfaces that include HyperTransport, DDR SDRAM, SysAD, and a boot bus. The CPU subsystem consists of two E9000 MIPS-64 instruction-set-compatible cores, both running at 1 GHz. Each core has a cache architecture of L1 data and instruction cache, coupled with 256 KB of joint L2 cache, providing a total of 512 KB of coherent L2 cache. The L1 caches are accessed in a single CPU cycle and access to the L2 cache occurs within five CPU cycles or 5 ns at 1 GHz. The dual E9000 cores are connected to each other by a processor switch that allows cache transfers between the CPUs at the core frequency. Price is $350 each/10K. PMC SIERRA, Santa Clara, CA. (604) 415-6065.
Company: PMC SIERRA
Product URL: Click here for more information