Interview: Bob Doud Discusses The TILE-Gx Architecture

Interview: Bob Doud Discusses The TILE-Gx Architecture

Many core processor architectures are common now but not so much when Tilera first started delivering their solution (see “Single Chip Packs In 100 VLIW Cores”). Since then, many other platforms have emerged like Intel's Knights Landing (see “ARMv8, GPUs And Knights Landing At ISC 2014”).

I spoke with Bob Doud, Tilera's Director of Marketing, about the latest TILE-Gx architecture and some of the design wins they have had.

Wong: Tell us a little bit about Tilera’s TILE-Gx architecture.

Doud: Tilera’s mesh-connected manycore processor architecture is the result of decades of research that led to the world’s first commercial 64-core processor back in 2007. We are now on our 4th generation of the “Tile Architecture” – the TILE-Gx family (Fig. 1). The basic concept is well-recognized today: The path to scaling performance without exponential increase in power is achieved by laying-down more and more cores, and then interconnecting them so that they can efficiently communicate with each other, with memory and with I/O and other peripherals. Our iMesh architecture makes that all possible, and provides for a scalable coherent cache architecture as well.

Figure 1. The device includes 72 identical processor cores interconnected with Tilera’s iMesh on-chip network. Each tile consists of a full-featured, 64-bit processor core as well as L1 and L2 cache and a non-blocking Terabit/sec switch that connects the tiles to the mesh and provides full cache coherence among all the cores.


The TILE-Gx family scales from 9 cores in a 3x3 mesh, to 16 cores in a 4x4 mesh, 36 cores (6x6), and up to our flagship TILE-Gx72 processor (8x9) currently holding the world’s highest EEMBC CoreMark score for CPU performance. The on-chip interfaces include multiple PCI Express ports as well as multiple 1Gb Ethernet and 10Gb Ethernet ports, with the TILE-Gx72 offering over 100Gbps of Ethernet I/O.

Wong: What application areas is the TILE-Gx targeting?

Doud: We continue to be very strong in the embedded networking and network-security markets. This would include customers implementing security systems such as IDS/IPS, DDoS mitigation, Firewall, or VPN appliances. In addition, we are seeing enormous traction in what we call “Network Intelligence” – systems including Network Monitoring, Network Forensics, Packet Brokering, Application Delivery Controllers (ADC), and Server Load Balancers.

This strength in the networking space has allowed us to readily fit into the datacenter, accelerating packet processing and security functions in the server.

And, we continue to see traction in the multimedia markets, specifically with high-density video encoding and decoding for applications such as HD videoconferencing, streaming video transcoding/transrating and streaming video delivery.

Wong: SDN and NFV are two major trends in the data center industry. Where does Tilera stand on these trends? Do you have products supporting SDN and NFV?

Doud: Yes, we see these increasing rapidly in the larger datacenters and Tilera has the perfect solution for this emerging market. By plugging-in a Tilera “Intelligent Application Adapter” in a PCIe slot, we can offload high-speed networking functions from the x86 host and allow the server to deliver 2 – 3x the performance without requiring additional rack space. That’s because Tilera processors are specifically designed for networking and deep packet processing and we can deliver 20, 40 or even 100Gbps of sophisticated networking functions in a single PCIe slot. Additionally, unlike some of the other high-end Network Interface cards in the market, TILE-Gx processors run Linux and are fully programmable by customers. This means that they can be readily adapted to changing datacenter needs without having to replace or upgrade the cards. We have already ported and tuned applications such as Open vSwitch (OVS) onto the TILE-Gx processors and we can deliver much higher throughputs at lower latencies than x86 and simultaneously free-up the CPU cycles on the server processors for their higher level application workloads.

Wong: I saw that MikroTik has standardized on the TILE-Gx family for their CloudCore router line. What benefits does your processor family provide and what does it allow their products to do better?

Doud: MikroTik has moved to adopt Tilera processors across their entire CloudCore router family and they currently have products using every one of our TILE-Gx family members from 9-cores up to 72-cores. Some of the key values for MikroTik include:

  • Simple, standard programming environment. Their RouterOS operating system was readily ported from PowerPC to Tilera’s processors in a remarkably short time

  • Deep System-on-Chip (SoC) integration with all of the needed I/O ports and memory controllers provided on a single chip, lowering total system cost and power

  • Scalability of the family, while maintaining 100% software compatibility across the devices

Wong: Speaking of data center technology, x86 is seen as the de-facto standard – but isn’t suited to all workloads. How can Tilera technology compliment an x86 system?

Doud: Our approach is to integrate a Tilera PCI Express “Intelligent Application Adapter” into a standard x86 server to gain a tremendous boost in networking and packet processing throughput and efficiency. We call this TILE-IQ. For NFV (Network Functions Virtualization) applications, this approach is very compelling for the datacenter operators since it saves on both power and rack space, while delivering significantly higher server performance.

But without a doubt, the x86 processors will continue to hold a strong place in executing the primary workloads in the datacenter. We see our role as being very complimentary to x86 in the datacenter.

Wong: Your TILE-Gx family scales from 9 to 72 cores. Is the number of cores the new metric of computing?

Doud: Yes, we believe it is. As we noted above, the days of simply increasing clock speed are over… the power penalty is too great. And there are limits to how much performance increase you can get by throwing more architectural widgets into a superscalar processor. In fact the “performance-per-watt” metric is often not helped by these complex enhancements since more transistors (and die area) are needed and they often involve speculative CPU operations that expend dynamic power unnecessarily.

Wong: What is next for Tilera?

Doud: Well, of course the big news is the recent announcement that EZchip has signed a definitive agreement to acquire Tilera in the coming few months. We are very excited about this transaction and the significantly greater footprint the combined company will have in the marketplace. The two company’s technologies are very synergistic and we will be able to leverage our complementary products at existing customers, as well as to exploit the broader portfolio in new markets.

As for Tilera’s manycore product family, you can expect more cutting-edge processors from us, pushing the envelope of high-efficiency computing. We are actively moving into the more advanced silicon process nodes, which of course helps with power and transistor density. And Tilera continues to innovate in the architecture itself, taking feedback from our customers to expand and improve upon our processing and communication performance. We’re moving into the 100 core milestone in the very near future.

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