Electronic Design

Design Flow Addresses Challenges At 65nm

Mountain View, Calif., USA and Shanghai, China: A 65nm RTLto- GDSII reference design flow (version 4.0) is the result of a collaboration between Synopsys Professional Services and Semiconductor Manufacturing International Corporation (SMIC). The flow adds the Synopsys Eclypse Low Power Solution and IC Compiler Zroute technology, expanding the resources available to designers to address low power and design-for-manufacturing challenges at smaller process nodes.

The flow uses Synopsys’ Galaxy Implementation Platform, a part of the Eclypse Low Power Solution, giving designers the ability to implement advanced low-power techniques throughout the design flow, including RTL synthesis and test, physical implementation, and signoff stages. In addition, IC Compiler’s Zroute technology supports SMIC’s 65nm routing rules, using advanced routing algorithms to evaluate the impact of manufacturing rules, timing, and other design goals.

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