Intel, Micron Joint Venture Delivers 34-nm NAND Flash Memory Chip

June 2, 2008
Using a 34-nm process technology developed by their joint venture—IM Flash Technologies—Intel Corp. and Micron Technology Inc. have introduced a 32-Gbit multi-level cell memory chip measuring only 172 mm2. The chip uses the smallest NAND proces

Using a 34-nm process technology developed by their joint venture—IM Flash Technologies—Intel Corp. and Micron Technology Inc. have introduced a 32-Gbit multi-level cell memory chip measuring only 172 mm2. The chip uses the smallest NAND process geometry on the market and is the only monolithic device at this density that fits into a standard 48-lead thin small-outline package (TSOP), according to the companies.

The chips will be sampling in June and are expected to go into mass production in the second half of the year. They will be manufactured on 300-mm wafers, each producing approximately 1.6 Tbytes of NAND.

The companies noted that the 32-Gbit chip was designed with solid-state drives (SSDs) in mind. The device will enable more cost-effective SSDs, instantly doubling the current storage volume of these devices and driving capacities to beyond 256 Gbytes in today’s standard, smaller 1.8-inch form factor. Based on the 34-nm architecture, Intel and Micron also plan to introduce lower-density multi-level cell products, including single-level cell products, by the end of this calendar year.

Intel
www.intel.com

Micron
www.micron.com

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