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Why Select a Digital Power Converter?

Why select a digital power converter?

By Per Lindman

, Ericsson Power Modules

Faced with ever increasing choices between analog and digital power converters, many engineers remain uncertain about the relative merits of digital control techniques. ‘Digital control’ in this context refers to closing the power converter’s internal feedback loop, rather than the subsidiary external control and monitoring functions that are increasingly digital by default. This change in converter implementation is the key element in any discussion regarding digital power, but what benefits accompany moving from tried-and-trusted analog loop control to a digital version? And what impact, if any, is there for designers wishing to use digital power converter modules in place of existing analog designs?

Tests compare converter performance

As always, it’s necessary to compare competing designs for parameters of interest. In this case, these include electrical performance, conversion efficiency, parts count, power density, reliability, and cost. Arriving at truly representative results requires a comparison between two converters that—apart from their inner control loop implementations—are as similar as possible. For this reason, we chose a traditional synchronous buck converter from Ericsson's range to provide baseline test data, making modifications to its core design to convert from analog to digital control.

The baseline PMH8918L employs analog control to supply up to 18A for non-isolated point-of-load (POL) applications. With a nominal 12V input and programmable output voltage, the device lies within a highly popular voltage and current range that should provide useful data for a wide range of customers. The equivalent digital design takes advantage of the ZL2005 chip from Zilker Labs. To ensure the most representative test platform, most of the power train components are common between the two designs.

The PMH8918L has the following basic specifications:
 

Output Current:
Topology:
Control method:
Input Voltage:
Output Voltage:
Switching Frequency:
Dimensions:
18A
Synchronous buck downconverter
Analog PWM (pulse-width modulation)
10.8V to 13.2V
1.2V to 5.5V (user programmable)
320 kHz
38.1 mm x 22.1 mm x 9.0mm

For these tests, a resistor sets the output voltage, and the converter’s sense pin connects to its output pin to configure local voltage sensing. While the conclusions should apply over a broad range of operating currents and power modules, tests to date were performed on a small group of samples of this model of regulator.

The ZL2005-based digital control implementation occupies the same PCB area as the PMH8918L and switches at 333 kHz, which is very similar to the analog regulator’s 320 kHz. A first set of tests uses the same Renesas high- and low-side output MOSFETs that appear in the PMH8918L for both converters (‘digital Renesas’). But to take advantage of Zilker Lab’s recommendations for optimizing the digital converter’s output switching dead-time (reference 1), a second set of results uses Infineon MOSFETs (‘digital Infineon’). These devices have a higher gate resistance (1.2Ω rather than 0.5Ω) but are otherwise very similar in terms of key parameters such as drain-source on-resistance and switching losses. The respective FET part numbers are:
 

PMH8918L (analog) Digital Infineon Digital Renesas
Low Side HAT2166H BSC029N025S HAT2166H
High Side HAT2168H BSC072N025S HAT2168H


Measurement Results

These tests compare the converter configurations using a 12V input voltage in a room temperature environment. The regulator’s output voltage was set to 3.3V or 1.5V via a programming resistor (see Figures 1 to 6 for efficiency and power dissipation):

Digital Infineon Digital Renesas
3.3V 18A
1.5V 18A
Efficiency
+ 0.8%
+1.2%
Power Dissipation
-0.57W
-0.45W
Efficiency
same
(not tested)
Power Dissipation
same

Comparison of Digital Performance vs. Analog

At full load, the Renesas digital configuration is equal to the analog solution, but does exhibit some improvement at lower load currents. The Infineon FET digital implementation is clearly better than the benchmark analog solution for both efficiency and power dissipation. The power dissipation graphs in Figures 2, 4 and 6 also show a reduction in power dissipation in the digital implementation. This is due to eliminating the house-keeping and protection circuitry that is necessary for the analog dc/dc circuit

As the output regulation performance for the Infineon and Renesas digital implementations were identical, only Infineon digital measurements appear in Figures 7 and 8. The output regulation performance for both analog and digital solutions is essentially the same. The slightly better performance for the digital solution that the graphs suggest is due to small differences in the test setup for measuring the analog and digital regulators.

Dynamic Performance

Output ripple and noise and output load transient response tests were performed for a 3.3V output voltage level. The filter used for the ripple and noise measurement consisted of a 0.1 µF ceramic and a 10 µF tantalum capacitor in parallel, as the PMH8918L’s datasheet defines. The dynamic load for the transient response measurements consisted of a step change from 18A to 9A and then back to 18A (see Figures 9 to 12 – dynamic performance).

The digital solution exhibits slightly higher ripple and noise that its analog equivalent, the main reason being component tolerances in the external 330 mF capacitor. There is also a minor variation that the small difference in switching frequency creates, but in practice, the ripple and noise performances are essentially the same.

The analog solution provided a traditional smooth voltage response to the dynamic load current change, as Figure 11 shows with amplitude peaks of approximately ±70 mV. The digital solution, which was programmed to work in Non-Linear Response mode shows similar peak amplitude at low-to-high load transitions, and somewhat higher peak amplitude at high-to-low load transitions (see Figure 12). Due to the NLR mode operation, the peak is distributed over time, generating a burst of peaks smaller than it would have been with NLR turned off. These NLR settings are not optimized; it should be possible to improve the dynamic response waveform. Even so, the amplitude of the voltage response is similar to that of the analog regulator.

Implementation Cost and Reliability Estimates

To create the most even comparison, these calculations contrast the benchmark analog regulator with the digital control version that uses the same Renesas FETs. Cost estimates are general due to uncertain trends in component costing, but there is sufficient data to project relative cost differences between the two approaches.
 
Component Count and Packaging

The component count for the digital regulator is 21 versus 58 for the analog regulator, which equates to a 64% reduction. This reduction will drive improvements in cost, packaging size, and reliability. Even though the PCBs of the two regulators have the same area, there is a significant difference in packaging density due to the digital solution’s lower component count (see Figures 13 to 16).

Clearly, the digital POL regulator layout is not optimized, and two approaches could greatly improve a production version. Reducing the PCB area by 40 to 50% while maintaining the 18A current rating would significantly improve packaging density; alternatively, it should be possible to approximately double the power-handling capacity within the existing outline.

Cost Estimates

In terms of bill-of-materials cost, a 10-pin version of a digital regulator (i.e. equivalent to the analog version) should definitely be less than the present PMH design, due to the reduction in parts count. While slightly more expensive, a 13-pin digital version with a communication interface should also be cheaper than the analog implementation. Cost savings should also come from mounting fewer parts during manufacture.

Reliability Estimates

Ericsson performs extensive failure rate analysis and reliability predictions for all of its products using the methodology that appears in Telecordia SR332, issue 1, black box technique. Mean-time-between-failure (MTBF) predictions are made under full output power at an ambient operating temperature of +40?C. The predicted reliability for the PMH8918L analog and Zilker Labs ZL2005 digital approach are:

Analog:   3.87 million hours
Digital:   4.31 million hours

The reduction in component count makes the digital version more reliable even with the addition of complex components, such as memory in the digital control chip. An 18A digital version built using the same PCB area as the existing analog module would lower the circuit’s operating temperature, further increasing MTBF.

Conclusions

The laboratory measurements and calculations provide four main conclusions:

1. The electrical performance, including efficiency, of the digitally controlled converter is equal to or better than the analog version. Additional work should optimize the dynamic load response of the digital design.

2. The digital solution results in more than a 60% reduction in parts count, significantly reducing the materials and assembly costs of the converter.

3. The parts count reduction reduces PCB real estate, allowing a converter size reduction or a power output increase within the present format. Either way, digital control increases power density.

4. Parts count reductions significantly increase the predicted reliability.

Importantly, these benefits require no additional effort from the OEM customer. The digital regulator module may be used interchangeably with the analog version, and requires no special interface or design accommodation. It’s also worth noting that the digital heart of the converter naturally lends itself to interfacing with external control and monitoring circuitry, so in this sense, much of the interfacing circuitry necessary within an analog converter comes “for free” in a digital version.

As a result, Ericsson plans to continue exploring the design of regulators and converters using digital controls. In the near future we will build, characterize and qualify designs using larger volume pilot runs. We also plan to further optimize the control designs and power train configurations to offer end-users the greatest possible benefit.

Per Lindman received a M.S.E.E. degree at the Royal Institute of Technology in Stockholm 1978 and has 28 years experience with power supplies and power systems. He is currently Strategic Planning Manager and Senior Advisor at Ericsson Power Modules in Stockholm. He is the author of several articles and conference papers as well as Committee Member of European Power Supply Manufacturers Association, Member of Power Sources Manufacturers Association and Member of High Density Packaging User Group’s BMPS User–Supplier Requirement Reference Group

Company: ERICSSON POWER MODULES

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TAGS: Components
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