DAC-powered charge pump varies negative rail

July 21, 1997
The circuit shown provides a low-current, adjustable negative supply rail suitable for use as a sensor bias, LCD-contrast bias, or a VCO tuning supply. By operating a charge-pump doubler from the output of a buffered DAC, it avoids the customary...

The circuit shown provides a low-current, adjustable negative supply rail suitable for use as a sensor bias, LCD-contrast bias, or a VCO tuning supply. By operating a charge-pump doubler from the output of a buffered DAC, it avoids the customary approach involving clumsy level shifters based on op amps and discrete components.

IC1 is a dual 8-bit digital-to-analog converter with serial input and buffered voltage outputs. Output impedances are 50 Ω, so the DAC output in use drops about 50 mV while providing the 1.1 mA typically drawn by the IC2 charge pump. As the input code varies from 0 to 255, the DAC output ranges from rail to rail, changing approximately 40 mV per step.

With 5 V (VCC) applied to IC1 and a −3 V output from IC2, the code that produces the minimum allowable voltage to the charge pump (1.5 V) is 80 decimal. The charge pump draws 0.6 mA and generates ±2 times the voltage at its VCC terminal, producing ±3 V to ±12 V as its input ranges from 1.5 V to 6 V (you can use the positive and negative outputs simultaneously). The main power can go as low as 2.7 V, producing a negative output slightly over −5 V. The minimum code for that condition is about 140 decimal.

To shut down the supply, simply write zeroes to the DAC. The DAC itself has a shutdown mode that draws only 1 µA. To ensure a reliable startup when bringing the system out of shutdown, write a value that powers the charge pump with a minimum of 2 V. Note that a microcontroller with pulse-width-modulation (PWM) output can eliminate the DAC altogether. For example, you can provide a variable VCC to the charge pump by filtering a 20-kHz PWM signal with a 270-Ω/3.3-µF low-pass network. Be sure that the microcontroller’s port pin can supply the current with an acceptable voltage drop; if not, buffer it with a CMOS buffer or inverter such as the 74HC04.

See associated figure

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