Electronic Design

LPT Port Drives Programmable Slewing-Voltage Control

This design modifies a simple first-order, low-pass filter into a slewing-voltage control that is programmable for its slope and amplitude through a PC's LPT port. These control parameters are typically required for metallurgy studies like corrosion of materials using a potentiostat. (A potentiostat, which is a standalone device, sets the required potential/second for the electrode under corrosion studies.) Figure 1 shows a circuit that supplies the scanning potential for the potentiostat.

Applying a step voltage of 0 to 5 V from LPT port pin 2 (Data bit 0, D0) to VIN charges capacitor C1 through R1 (1 MV), producing a ramp output at IC1 pin 6. Thus, a triangle waveform is generated for a square-wave pulse input. The result is a slewing-voltage output for the corresponding input timing pulse. In this design, the time period is maintained at 1 second by the control program.

A CMOS switch (S3) is activated by a falling ramp—or by the triangular waveform in the case of the square input pulse falling edge—by the user control program. This happens via parallel port pin 3 (data bit1, D1), which discharges the capacitance through R2 (4.7 MV) in the same time interval as the charging time to get a symmetric falling ramp.

The circuit uses a MAX542 16-bit serial digital-to-analog converter (DAC) with three-wire connectivity to the PC's LPT port. The DAC receives the slewing-voltage input from IC1 pin 6 as a VREF. It also supplies an amplitude-controlled output as per the serial data digital pattern received from the control program via LPT port pin 16 (Initialize printer control output). Loading the required serial 16-bit digital pattern is achieved by the serial clock (SClk) generated by the control program via pin 14 (Auto feed control output) of the printer port. LPT port pin 1 (Strobe control output) provides chip select CS

for the DAC.

Instead of the DAC, one can use a digital potentiometer for amplitude control. With the 16-bit DAC, a very low-amplitude slope (VOUT = VIN/65536, i.e. ~38 mV) can be achieved, because VIN = 2.5 V. As per our requirement, this design produces a satisfactory slewing output voltage ranging from 100 mV/s to 2 V/s.

CMOS switches S1 and S2, controlled through pin 4 (data bit 3, D2) of the LPT port, supply positive and negative polarity for the slewing control-voltage output. Logic Low on pin 4 (for positive) and Logic High for negative output can be selected through the control program. Figure 2 shows the various control-voltage output waveforms produced by the circuit.

The control program can be written in any language like C, C++, V, or VC or graphical languages like LabView. The user control program selects the timing sequence as well as the amplitude of the control-voltage output.

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