Electronic Design

Powerline Dropout Simulator Tests Reset Circuits

Short ac powerline dropouts can cause incomplete power-on resets, leaving the microcontroller and logic circuits in an indeterminate state. This susceptibility can be tested using a very low-cost eight-pin microprocessor and a solidstate relay (SSR). Operation of the reset circuit under test is accomplished by varying the number of half-cycle powerline dropouts.

The dropout simulator, an ATtiny11 MCU, detects the line frequency zero crossing using level shifter Q1 and its internal comparator (see the figure). U3, an SSR, is deactivated upon detecting the zero-voltage crossing, and a delay of approximately one-quarter cycle of the powerline frequency. Delaying the SSR control input compensates for the MCU's RC clock tolerances.

This type of relay continues to conduct until the next zero line voltage is sensed by the relay, at which time the solid-state contacts are opened. The number of half cycles the SSR remains open is based on the S2 DIP switch setting. S1 initiates reading of the DIP switches and a power dropout from 1 to 512 half cycles (8.3 ms to 4.3 s at 60 Hz), depending on the setting of the nine switches.

A variety of SSRs may be used based on the load current and line voltage.

The schematic lists three Crydom SSRs based on load rating. Any SSR can be used as long as it has zero-voltage switching with a maximum turn on/off of one half cycle. The minimum ac load must be observed for the relay used, and it can be guaranteed by connecting a 10-W or higher line-voltage lamp in parallel with the load.

Click here for the ATtiny11 source code and HEX file.

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