Electronic Design
What’s The Difference Between Linear And Switcher MCU Power Supplies?

What’s The Difference Between Linear And Switcher MCU Power Supplies?

When designing a system including a microcontroller unit (MCU), a low-dropout (LDO) linear regulator is generally used as a low-cost, high-accuracy, and easy-to-implement power supply solution. However, a switch-mode power supply (SMPS) more easily meets other possible system design goals such as efficiency and battery run time. 

When designing a system including a microcontroller unit (MCU), typically very little time and thought is given to the MCU’s power supply. End customers deem other system pieces such as MCU selection, memory, peripherals, analog functionality, and sensors more important. Therefore, they usually get the most attention and design effort.

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In these cases, a low-dropout (LDO) linear regulator is generally used as a low-cost, high-accuracy, and easy-to-implement power supply solution. However, a switch-mode power supply (SMPS) more easily meets other possible system design goals such as efficiency and battery run time. 

Differences Between LDOs And SMPSs

An LDO is possibly the simplest regulated power supply. It does not store energy or repetitively switch its transistor on and off. It merely drops excess input voltage across a pass transistor, operated in the active region, to create a low-noise and regulated output voltage.

With no switching or energy storage, an LDO produces very little noise, requires no inductor, and provides a high-accuracy output voltage. Simply dissipating excess voltage in the pass transistor is very inefficient, though, and creates heat. LDOs may provide an acceptable power supply solution when using ultra-low-power MCUs. But when used to provide power to high-performance MCUs, the power dissipation across the pass transistor is significantly higher, creating excessive heat and posing reliability problems in addition to lower efficiency.

Alternatively, an SMPS stores energy in a capacitor or inductor. The switching action required adds noise and ripple to the output voltage, which decreases its accuracy. The switching transistors are operated either fully on or fully off, which is more efficient than their active region of operation. Thus, SMPSs have comparatively high efficiencies—usually over 80%.

While an LDO typically requires only two capacitors, most modern SMPSs of the same power level are just as simple, requiring only an additional inductor. Given the complexity involved in an SMPS design, the overall cost of a system involving an SMPS is usually higher than one using an LDO. This is offset by lower power dissipation resulting from an increased operating efficiency.

System Comparison

The always-on housekeeping MCU (also called a system management MCU) is a key system component in battery-powered computing devices such as notebooks and tablets. Drawn directly from an ac adaptor or the device’s lithium battery pack, the power consumed by this MCU and its power supply significantly impacts the device’s operating and standby time.

When powered from the higher-voltage adaptor or when the microcontroller operates at a higher system clock frequency to deliver higher performance, increased power consumption may generate significant heat. This could be uncomfortable for the user or even negatively impact the system’s reliability by overheating the MCU’s power supply or neighboring components on the circuit board.

To compare LDO and SMPS solutions for a specific notebook, assume a 20-V adaptor and a three-cell (10.8 V nominal) battery pack powering a MCU that requires 3.3 V at up to 150 mA. The TPS70933 is a simple LDO that meets these requirements, while the TPS62177 is a correspondingly simple SMPS (Fig. 1).1

1. The TPS62177 SMPS includes a sleep mode, which increases its efficiency at very low output powers by reducing its quiescent current (IQ), compared to the TPS70933 LDO.

At very light load currents (< 10 µA) corresponding to shutdown or very deep standby modes, the LDO is somewhat more efficient than the SMPS. But as the MCU gets even slightly more active, drawing a little more current, the SMPS’s efficiency is higher. This is due almost entirely to the quiescent current (IQ) drawn by each device.

At extremely light loads, the IQ determines the input current drawn and, thus, the efficiency.2 As the load current increases, IQ quickly decreases in importance. The LDO’s IQ is 1.35 µA, while the SMPS includes an MCU-activated sleep-mode, which reduces its IQ to 4.8 µA. Because both IQs are very low and nearly the same, the break-even point where the SMPS becomes more efficient than the LDO occurs at a very low load current.

Figure 1 also indicates an inherent LDO limit: maximum efficiency. Due to its linear topology, an ideal LDO has a maximum efficiency of VOUT/VIN. This equates to 30.6% efficiency at a 10.8-V input and 16.5% efficiency at a 20-V input. This is the LDO’s maximum possible efficiency, which is reached only at higher load currents.

By contrast, theoretically, the maximum possible efficiency of an SMPS is 100% and does not depend on VIN or VOUT. Even at this example’s 150-mA full load current, the SMPS’s efficiency is still increasing, whereas the LDO already has reached its maximum. This rather low efficiency at full power draws more battery current (Fig. 2).

2. As the load current increases, the battery current also increases. The SMPS has little impact on run time compared to a 100% efficient power supply.

Figure 2 shows that as the MCU draws more than about 10 µA when operated in low-power modes, such as sleep mode or deep-sleep mode, the SMPS starts drawing significantly less battery current than the LDO. Thus, the notebook runs longer with the SMPS—nearly close to an ideal power supply. While this is a greatly simplified analysis of a complicated notebook system, it does illustrate a key notebook user concern—battery life—that is directly affected by the choice of power supply topology.

Conclusion

LDOs and SMPSs are both valid topologies for powering high-performance MCUs in a notebook. While the LDO provides an output voltage with no ripple, this is not usually required by a digital microcontroller. As well, they are usually not the most efficient. In some low-cost systems, the LDO’s cost and size advantages outweigh its poorer efficiency and excessive power dissipation. Modern SMPSs have advanced power-saving modes, which increase their efficiency to be on par with an LDO, even at very low-load currents. These advantages should prompt design engineers to take another look at modern, easy-to-use SMPSs for their MCU systems.

References

1. Download these TI datasheets: www.ti.com/tps70933-ca, www.ti.com/tps62177-ca, www.ti.com/ucc28722-ca

2. “IQ: What it is, what it isn’t, and how to use it,” Chris Glaser, Analog Applications Journal (SLYT412), Texas instruments, 2Q 2013

3. “Powering Tiva™ C Series Microcontrollers Using the High Efficiency DCS-Control™ Topology,” Ashish Ahuja and Chris Glaser, Application Note (SPMA066), Texas Instruments, February 2014

Christopher James Glaser is an applications engineer for TI’s Low Power DC/DC group. In this role, he supports customers, designs evaluation modules (EVMs), writes application notes, trains field engineers and customers, and generates technical collateral to make TI parts easier to use. He received his BSEE from Texas A&M, College Station, Texas. He can be reached at [email protected].

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