FET-OR Circuit Switches Between Main And Backup Supplies

March 2, 2006
The circuit of Figure 1 provides a "diode-OR" function for applications that must switch automatically between the main and backup supply voltages. Such applications include battery-backed memory supplies and any battery-operated device with a

The circuit of Figure 1 provides a "diode-OR" function for applications that must switch automatically between the main and backup supply voltages. Such applications include battery-backed memory supplies and any battery-operated device with a wall-adapter connection.

For example, a battery-backed SRAM circuit (nonvolatile memory module) requires at least two power sources: a high-current active path for the SRAM memory (VIN1) and a low-current standby supply (VIN2) that preserves memory contents when the main supply is removed.

The conventional diode-OR connection presents a problem in either path Fig. 2). In the VIN1 path, a diode drop can throw the supply voltage out of tolerance: 3.3 V 10% has a minimum of 2.97 V, so a typical diode drop (0.6 V) places VIN1 outside the 10% limit. The tolerancing issue is even worse for memory ICs with lower-voltage power supplies.

On the standby side (VIN2), we want the lowest possible voltage drop to maximize the useful life of the standby source (whether battery, supercap, or other voltage source). A drop of 0.6 V, though, is about 15% of the output of a fully charged (4.1 V) lithium-ion battery.

Schottky diodes improve the situation somewhat, reducing the forward drop to a range of 0.3 to 0.5 V. But substituting FETs for the diodes reduces the drop to about 0.1 V. To create a "FET-ORed" supply with low forward drops, place a FET in each power path as shown in Figure 1, controlled by the power-supply sequencer (U1).

You can decrease the losses on VIN1 and VIN2 to less than 50 mV each by using an FDC633N transistor (Fairchild) for the VIN1 path and an FDN304P for the VIN2 path. Q1 was selected for its current-handling capabilities and low on resistance. Q2 was selected for its low gate-to-source voltage (down to 1.8 V, the equivalent of two depleted AA cells at 0.9 V each) and low on resistance.

Both FETs are installed backward to reverse-bias their body diodes. This prevents excessive current flow while providing a smoother transition from one source to the other.

U1 acts as a source detector and debouncer for the wall adapter. The device monitors VIN1 with a programmable delay (use a MAX6819 for a typical fixed 200-ms delay) to ensure that battery power isn't switched off until the wall supply is stable at or above U1's trip voltage.

Without D1, note that VIN2 could be back-driven by VIN1 (less the body-diode drop of Q1) during U1's time-out delay period. To prevent that problem, D1 drives Q2 off as power is applied from the primary source (VIN1).

U1's internal charge pump creates the gate output that fully enhances Q1 and biases Q2 off. That output is approximately VCC2 + 5.5 V. R3 was added to drive the gate signal more rapidly to ground, assisting the turn-on of Q2 when VIN1 is removed. R3 should be as large as possible, because loading the gate output resistively adds load current and reduces the gate-drive capability. (For proper operation, this circuit assumes the amplitude of VIN2 is less than that of VIN1.)

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