Today, semiconductors account for around 15% of the value of a car's electronic components. This is expected to reach 30% by 2010. Cars now have between eight and ten subnets, 50 to 60 network nodes, and an architecture that enables Controller Area Networks (CANs) and Local Interconnect Networks (LINs) to complement each other.
CAN, invented in the 1980s by Bosch as a fault-tolerant, high-reliable bus system for airbag and ABS applications is still the most common bus protocol used in cars. It is limited to a 1Mb data rate, which is insufficient for modern body electronic or pre-accident innovations.
New communication standards will emerge. Thus, it is important to select a test architecture that is open to expansion and capable of meeting future device test requirements.
FlexRay is the most promising successor to CAN, combining high data rates with a simple, fault-tolerant bus system. Media Oriented Systems Transport (MOST) will be a separate bus standard, dedicated to automotive entertainment applications and car navigation.
These new standards will drive digital content in conventional automotive devices; digital pin counts and digital speed will increase. The semiconductor vendor must select an automatic-test-equipment (ATE) platform that has enough digital instrumentation in terms of channel density and speed. These attributes become even more important if semiconductor vendors pursue a parallel test strategy to reduce test costs and increase the throughput per test cell.
The 42V PowerNet has attracted a lot of attention in recent years. Discussions between car manufacturers about the cost/ benefit ratio are more controversial than the technical details. Every automotive semiconductor supplier has 42V-compliant products, although demand is small. Clearly 42V PowerNet's time will come—but when its introduction and mass production will materialise is a moot point. Car manufacturers will probably start with 42V/14V dual voltage cars and eventually move toward a 42V PowerNet car by the end of the decade.
The more important question from an ATE perspective is whether or not test requirements will change, mandating new instruments. A serious consideration is that the maximum voltage on VBAT typically has to stay below a limit of 68V.
The second consideration is reverse battery, which is what happens when a car is jump-started with the cables connected incorrectly. The voltage rails of the car taking the charge are reversed. So, to prevent severe damage to the electronics and their components, all automotive devices have to be robust enough to withstand full reverse-battery voltage, applied infinitely.
Reverse battery is much harder for 42V cars to withstand as the voltage has, in effect, tripled. This is where standardisation comes in. The rule for 42V PowerNet is that the maximum negative voltage must not exceed -2V under any circumstances. This reduces the test requirement for 42V devices from reverse battery to -2V. Figure 1 compares the differences between the standards: 42VPowerNet does not demand large negative voltages, but increases the need for VI channels with a 42V/75V capability.
Figure 2, which shows a modern car door control unit, offers an example of how next-generation semiconductors will reduce cost and weight. Most cars have automatic door locks, electric windows, and mirrors, usually controlled by a single unit in the door through a CAN that interfaces with a central control unit. A heavyweight, waterproof copper wire harness delivers the control signals, voltages, and sensor feedbacks to the motors located in the mirrors, locks, and windows.
All components, such as microcontrollers, switches, and regulators, are discrete and mounted on PCBs in separate modules.
Seamless device testing is guaranteed because dedicated ATE tests exist for each device incorporated into the control PCB. The microcontroller is tested on a digital ATE platform, the power switches are tested on a traditional power ATE platform, and the other vital but few components are distributed across different AC, DC, and digital ATE solutions.
To reduce cost and weight, semiconductor manufacturers have started building intelligence into the switch so that it can control its functions and communicate with the rest of the car. A common combination to provide this intelligence is a power driver, microcontroller, voltage regulator, and sensor interfaces, all of which are usually integrated into a multichip package as low-voltage silicon. This is because high-speed microcontroller structures and high-voltage processes would make these ICs too expensive. The control and communication with other units in the car takes place through CAN or emerging bus standards like LIN.
These highly integrated devices are encapsulated directly in the housing of the motors for the window, mirror and/or door lock, and do not need separate protection against their harsh environment. The door's central control with its heavy weight copper wire harness has been replaced by a single device controlled through a dual-wire, differential CAN or single-wire LIN bus architecture.
All of this works well for the car manufacturer. The cost savings are obvious and significant, but this new architecture challenges traditional, automotive power ATE architectures. Conventional test architectures are not able to test such ICs because the requirements are so diverse:
- the half bridge driver requires voltages from −20V to +75V and up to 20A pulsed current for RDSon and short-circuit current measurements
- the LIN or CAN interface requires digital IO capability at up to 2MHz speed with voltages ranging from −2V to +24V, plus timing measurements and voltage/current measurements
- the microcontroller requires up to 40 digital channels with digital formatting and edge placement flexibility at frequencies between 20 and 50MHz
The fundamental problem is that the test engineer does not have direct access to control gates of the switches. So, to switch the device into the desired state, they have to download and execute the correct routine into the IC's microcontroller. Conventional power ATE architectures do not have the necessary level of synchronisation between instruments to enable the microcontroller vector burst. The burst starts the control sequence for turning ON one of the half-bridge drivers and the DC instrument to trigger the measurement in synch to capture the result.
Ideally, ATE architectures now need to support 100% synchronisation across the entire instrumentation suite, AC, DC, and digital. Conventional ATE architectures might be able to test these devices, but it will take much longer to put the device into a particular test state, hold it, and connect AC, DC instrumentation to perform the measurements.
Instrument synchronisation and setup speed become more important when users pursue a parallel test strategy. Fully pattern-controlled instrument architectures test single sites faster and test multi-sites more efficiently.
WHERE DOES FLEX FIT IN?
FLEX test architecture meets all of the device requirements for automotive semiconductors:
- many devices have multifunction cores, each with its own time domain. FLEX is architected to address this—full test resources are available for each device core running at its native speed
- test resources are synchronised by Sync-Link while a digital signal processor (DSP) operates in the background, reducing test processing overhead
- high-density instrumentation packs more capability on to each board and into each system while the system broadcast facility supports efficient, multi-site instrumentation setup;
- IG-XL Software organises device-oriented data and test methods into a test flow built for multi-site testing
- performance can be scaled to accommodate a range of instruments for analogue, digital, and mixed-signal/SoC applications
- universal slots accept any FLEX instrument for easy reconfiguration and redeployment
- third-party instrumentation can be integrated into FLEX hardware and software through the OpenFLEX open architecture
- multi-site implementation in near 'zero-time,' supporting up to 32 sites
- instrument-sliced architecture simplifies expansion, since the software driver can be plugged into any instrument that is added to the test system
- multi-layered programming using templates speeds up the implementation of standard tests
- personal template program to generate templates for use throughout the organisation
- code-based programming provides access to every instrument so that highly specialised tests can be set up.
Testing automotive SoC devices—like low-cost smart motor controllers, ABS, or Airbag controllers—requires a diverse set of instrumentation, ranging from high-voltage digital channels to VI sources and timing measurement instrumentation. Resources are limited in conventional automotive power testers, limiting the amount of pins and sites that can be tested in parallel.
The FLEX High Voltage Digital (HVD) option avoids this situation. It delivers a suite of instrumentation needed for a communication interface test at an extreme density with 24X channels per instrument board. Each individual channel allows the user to test digital performance, high-voltage clamp, propagation delay, and rise and fall times.
Figure 3 shows the HVD instrument board and summarises key performance aspects. Through the FLEX universal slot architecture, a tester can support multiple HVD instruments that allow parallel testing of pins and sites, reducing test times and equipment costs. The HVD option offers automated hysteresis testing at multiple pins and sites in parallel, which will change the way manufacturers think about automotive device test. The HDV option relies on the Sync-Link architecture to ensures its operation is fully synchronised with the test instrumentation.
The accelerated development of consumer electronics typically means a product cycle of nine to 18 months. It is putting pressure on car manufacturers to quicken the pace of electronic implementation and on semiconductor manufacturers to increase the speed of their development, qualification, and production ramp cycles. The only way they can meet these demands is through a flexible and open ATE architecture.