The Agilent Technologies M8061A multiplexer can test and characterize high-speed receivers used in the growing number of fast digital interfaces. The interfaces used in servers, storage systems, and data centers are getting faster as 40G, 100G, and other standards are being adopted.
These standards include IEEE 802.3ba/bj for 100-Gigabit Ethernet, Fibre Channel, CFP2, InfiniBand, OIF CEI, PCI Express, SATA, SAS, USB 3.0, DisplayPort, Thunderbolt, and others used in networks, backplanes, and active cables. Most of these standards use four 25.78125-Gbit/s channels or some similar speed.
The M8061A is designed to work with Agilent’s N4903B jitter-bit error rate tester (J-BERT) with pattern generation up to 14.2 Gbits/s (see the figure). It multiplexes two pulse signals from the N4903B into a single signal for the receiver under test. This allows double the rate from the J-BERT up to 28.4 Gbits/s.
A key feature of the M8061A is itsoptional de-emphasis capability. Most high-speed signal sources use some from of pre-emphasis to mitigate cable channel distortion. An optional four- or eight-tap de-emphasis circuit allows you to select the desired amount of de-emphasis to produce a solid opening in the eye pattern output. The test receiver output goes to an Agilent N4877A CDR and demultiplexer, then back to the J-BERT for loop back testing.
The M8061A offers four- to eight-tap de-emphasis capability up to 28.4 Gbits/s plus clock/2 jitter injection. The multiplexer is transparent to calibrated jitter injection from the J-BERT. Control is from the J-BERT via a USB port. Other specifications include 14-ps transitions from 20% to 80%, 1.2-V p-p outputs, <200-fs rms intrinsic jitter, interference superposition capability, and dc output coupling.
The M8061A is available now. The basic unit with the four-tap de-emphasis option costs $45,740. Add $9900 for the eight-tap option.