The evolving consumer demand for flexible, high-bandwidth applications is fueling a race for new, high-performance, wireless-local-area-network (WLAN) products. While drawing on the latest international standards for WLAN communications, semiconductor companies are rushing to be the first to market with increasingly complex integrated circuits (ICs). These ICs combine radio-frequency (RF), analog, and digital circuits into more highly integrated chips and chip sets. Yet evolving WLAN standards, such as IEEE 802.11a, 802.11b, and 802.11g, call for communications protocols with complex signal modulations over wider bandwidths. They also want a dynamic range that is greater than anything that has ever been seen in commercial communications products.
For the companies seeking to get to market with these complex devices, the new wide-bandwidth, high-performance WLAN devices impose severe demands on test equipment and methods. Originally, both the test equipment and the methods were created to address traditional narrow-bandwidth devices. These devices operate at information bandwidths under 100 kHz. Now, WLAN test methods and test architectures must provide real-world signal environments with flexible test systems. These systems must be able to deliver the high bandwidth, accuracy, and speed required for WLAN RFIC test. In addition, the methods and architectures have to bring forth the high throughput, lower cost of test, and capital preservation required for financial success in the competitive WLAN marketplace.
Consumers are looking for the simplified wireless connectivity of personal, workgroup, and home-entertainment appliances. Meanwhile, semiconductor companies are quickly moving to deliver higher-bandwidth products in the unlicensed 2.4-GHz and 5-GHz bands. The IEEE 802.11b standard introduced high-performance wireless products that were able to take advantage of interference-resistant, direct-sequence-spread-spectrum (DSSS) communications protocols. These products could deliver 11-Mbps single-channel data rates. By spreading the signal across several frequencies, DSSS devices use pseudo-noise-modulated signals. They can therefore achieve higher data rates with greater reliability compared to earlier-generation approaches.
Using even more complex modulation protocols, including orthogonal frequency division multiplexing (OFDM) and up to 64-quadrature amplitude modulation (64QAM), wireless vendors can achieve 54-Mbps data rates. Thanks to these protocols, WLAN devices are rapidly approaching wired rates in an emerging class of wireless equipment for bandwidth-intensive applications. These applications are as divergent as voice over IP—with its low-latency requirements—and high-definition streaming-video delivery, which has high-throughput requirements. The IEEE 802.11a and European Telecom-munications Standards Institute Broad-band Radio Access Networks (ETSI-BRAN) Hiperlan2 standards both use OFDM and 64QAM in the 5-GHz band. Yet another standard, IEEE 802.11g, uses OFDM to provide 54 Mbps in the 2.4-GHz band.
At the heart of these high-speed wireless standards, the OFDM protocol uses a unique multi-carrier modulation scheme. This scheme splits data into several parallel streams. Each of these streams modulates mutually independent or orthogonal subcarriers within a 20-MHz nominal channel. Because of the parallel data transmission, OFDM is able to achieve 54-Mbps throughput with significantly lower modulation rates.
In addition, the standards include sophisticated forward-error-correction (FEC) mechanisms. These mechanisms help to ensure data integrity even if interference or multipath problems affect the subcarriers. In turn, this combination of modulated signals, increased data rates, and complex encoding mechanisms compounds the requirements for WLAN test equipment. In the course of testing device functionality, that equipment must now be able to extract data at megabit rates from complex, high-frequency modulated signals.
As signal complexity continues to grow, semiconductor manufacturers are migrating to a new design and technology base. The latest process technologies are enabling greater integration and performance. They are continuing the progression from pure radio-frequency devices to integrated chip sets and multi-chip modules (MCMs).
Today, RFIC manufacturers are exploiting advances in a variety of process technologies. These technologies include SiGe, BiCMOS, SiGe BiCMOS, gallium arsenide (GaAs), and even ultra-deep-submicron CMOS technologies at 0.15 µm and below. In particular, SiGe/BiCMOS processes are emerging as an important technology for high-performance wireless applications.
These processes flaunt low power consumption, temperature stability, and low-noise performance. In addition, available submicron SiGe/BiCMOS processes offer extremely high bandwidth performance with device transit time frequencies (ft) in the tens and even hundreds of gigahertz. To reduce on-chip interference, these processes are built on enhanced CMOS base processes with deep trench isolation. Advanced SiGe/BiCMOS processes can therefore accommodate digital logic circuitry along with high-performance RF and analog elements.
At the circuit level, RF designers are replacing the traditional superheterodyne receiver with zero-IF designs. These designs reduce the number of mixer stages previously needed to convert the carrier signal to and from an intermediate frequency (IF). Instead, zero-IF designs convert the signal directly to and from the baseband frequency.
At the component level, zero-IF designs also result in more compact systems. The reduction in mixer stages allows designers to eliminate associated external components, such as surface-acoustic-wave (SAW) filters. Through the exploitation of advanced process technologies, RFIC designers can now integrate the required direct-conversion elements like low-noise amplifiers (LNAs), oscillators, and baseband filters in single-chip WLAN devices. For test engineers, however, the move to zero-IF receiver design creates a need for improved test-system linearity and more effective test methods. Traditional parametric tests are no longer possible for these designs.
By leveraging new design strategies and advances in process technologies, designers can continue the integration of elements as diverse as RF and analog interfaces, embedded memory, and high-performance digital. As a result, newer WLAN solutions reduce components to two chips: a high-bandwidth RF front end and baseband chip. These solutions boast improved RF performance, lower noise, and decreased power requirements. Yet they also compound the challenges facing test engineers.
For wireless semiconductor companies, leading-edge RFICs impose significant new test requirements. Such requirements are needed to account for emerging wireless signal characteristics and design techniques. As advanced processes permit the increased integration of RF, analog, and digital circuits on a single die, comprehensive test programs and instrumentation sets are required. They must deal with the increased diversity of signal types.
Further requirements also arise for the increased numbers of digital and analog pins and RF ports. The integration of additional systems components is rapidly pushing requirements for additional digital test performance. Examples include digital signal processors (DSPs) and embedded memory for encoding and decoding modulated signals. These increased integration capabilities also have enabled RFIC companies to respond to the proliferation of standards. They have developed WLAN chips that can work with multiple bands and standards. In the process, RFIC designers have moved to more integrated power amplifiers to support tri-band applications.
Such applications are expected for 802.11a. That standard specifies three separate frequency bands with low-, medium-, and high-power capabilities. These capabilities combine with the additional complexity brought on by increased integration, high linearity, and power efficiency. All of these factors are required for next-generation WLAN applications. They will therefore drive continued enhancements in ATE systems, which will test these new power-amplifier designs.
While power-amplifier (PA) design evolves, sophisticated receiver architectures like zero-IF will enable more integrated WLAN solutions. Such architectures also will present heightened design challenges that translate, in turn, to more involved test requirements. Zero-IF receivers need to provide highly linear and low-noise performance with strict control over DC offset and signal isolation.
DC offsets can affect zero-IF receiver performance. They can even cause these receivers to saturate during operation. Isolation problems can lead to self-mixing, which occurs when the local-oscillator (LO) signal radiates to the antenna. By definition, the direct-conversion LO frequency is the same as or very close to the RF. Consequently, when the LO signal leaks through the low-noise amplifier (LNA), it mixes with itself again. The result is a blocking signal.
To deal with these problems, designers use highly linear converters and compensation. These elements can impact power requirements and performance in their own right. They also may put further stress on test linearity requirements. In addition, design teams often bring out a test point from the zero-IF stage. The DC nulling circuitry can then be examined prior to the embedded analog-to-digital converter (ADC). This step adds a further requirement for mixed-signal test capability.
Zero-IF receivers are already on the market. They will continue to proliferate to lower part counts while reducing system cost. As stated, however, the move to zero-IF receiver design forces engineers to find new test methods. Traditional RF-to-RF tests, such as noise-figure measurements, are becoming less applicable. They now necessitate end-to-end system metrics like bit error rate (BER) and error vector magnitude (EVM).
Figure 1 shows a typical constellation plot for an 802.11a signal at 54 Mbps. By looking at constellation plots, system designers and test engineers can determine errors in the device due to modulator amplitude, phase imbalance, or phase noise. These effects are shown in Figures 2A, B, and C. Because it is specified for 802.11a-based systems, EVM provides an indication of modulation accuracy. It presents the difference between actual and ideal (modulated) signals. End-to-end metrics, like BER and EVM, require test equipment that can demodulate the signal and handle time synchronization for data extraction.
For RFIC companies, the act of characterizing wireless chips for WLAN standards demands a significant increase in required test capabilities. As new capabilities evolve, the WLAN market keeps driving the bandwidth and dynamic range that are required of testers. As a fundamental requirement, test equipment now needs to deal with significantly higher bandwidth and greater linearity. To fully capture an 802.11 signal, for instance, a WLAN tester already needs a 20-MHz nominal bandwidth in its RF subsystem. Other emerging standards will drive modulation bandwidths to 40 MHz, further widening the gap between traditional RF test methods and real-world applications (FIG. 3).
Test equipment also must support greater frequency ranges with more stringent performance characteristics. To support the measurements required in many WLAN devices, for example, the equipment needs to provide 18-GHz measurement capability. This capability is needed to determine the third harmonic (17.4 GHz) of 5.8 GHz, which represents the upper end of the 5-GHz band used by 802.11a equipment.
For sensitive WLAN measurements, test equipment must provide excellent port-match characteristics. It can then reduce mismatch uncertainty, which can be substantial at WLAN frequencies. To also deliver a satisfactory voltage standing wave ratio (VSWR) at frequencies exceeding 5.8 GHz, extreme attention must be given to circuit design geometries. These concerns are somewhat new to many designers, who have focused on designing commercial systems for the past 15 years. Most of those systems operated below 2 GHz.
The merging of gigahertz operation, complex modulated signals, and high data rates is changing the nature of RF test. It also is placing new burdens on semiconductor companies. Complex-modulation signal environments, such as OFDM, are driving the need for test equipment with greater dynamic range. In addition, OFDM boasts high peak-to-average power ratios. Such ratios require highly linear low-noise amplifiers that can provide better than 80-dB spurious free dynamic range (SFDR).
Complex modulations ranging from DSSS to OFDM and n-QAM schemes have rapidly emerged. This trend has left companies in a precarious position. They want to rely upon the traditional test methods and equipment that were created for narrowband single-carrier designs. The companies realize, however, that these technologies lack the performance characteristics needed to deal with emerging WLAN devices for 2.4-GHz and 5-GHz bands.
Active devices, such as power amplifiers, behave differently under sinusoidal and modulated stimuli. Consequently, the traditional test approaches—based on sinusoidal measurements like S-parameters—are ineffective for high-performance WLAN RFICs. Say these designs are tuned and tested with sinusoidal waveforms. In actual applications, they will perform differently due to the presence of modulated signals. In other words, there will be a risk of field failures in devices that seemed to pass factory performance tests.
To deal with this situation, RFIC companies are eliminating the traditional sinusoidal S-parameter measurements taken with vector network analyzers. They are replacing them with modulated S-parameters, which are measured using modulated-vector-network-analysis (MVNA) methods. These new methods give RF designers the same underlying model for the interpretation of results. But they stimulate the device-under-test (DUT) with modulated signals, thereby providing results like modulated S-parameters. These results more faithfully reflect real-world performance. For designers, being backed by more accurate data means being able to reduce guardbands. The result is improved yield.
To handle increasingly complex measurements, WLAN test systems offer improved instrumentation for multi-band WLAN device test. The Credence ASL 3000RF is one example. This system is unique in its support for MVNA technology. It combines modulated S-parameter measurement capabilities with sophisticated mixed-signal test instrumentation. Because of the increasing complexity of higher-bandwidth signals, current wireless-local-area-network test systems offer appropriately robust architectures. These architectures are able to respond to the increase in sampling rate and throughput associated with WLAN devices.
Previously, traditional test sampling architectures had to deal with sample rates in the megahertz region at a resolution of 8 to 10 b. Now, however, signal bandwidths are at 20-MHz nominal. Dynamic-range requirements are in excess of 80 dB. WLAN device test therefore requires a difficult combination of high sample rates and fine resolution. WLAN test equipment like the ASL 3000RF can acquire data with 14-b resolution at 65 MSamples/s (FIG. 4).
After data acquisition, WLAN device characterization requires a battery of complex measurements. During this process, the equipment needs to acquire high-resolution data at megasample rates while applying the appropriate demodulation algorithm. It can then extract the digital data for comparison with the original data. Advanced systems like the ASL 3000RF use architectures that can maintain high test throughput. They can then provide the speed and capacity needed to handle diverse test measurements, such as BER, EVM, and modulated S-parameter calculations. All of this is done from a single data acquisition.
Along with demands for fast acquisition and processing, test systems for WLAN devices face fundamental requirements like high throughput, flexibility, and cost effectiveness. In today's business climate, these requirements are needed in all stages of product development. Test equipment must provide the ability to compress radio-frequency test times and maximize throughput. Often, it must handle multiple WLAN characterizations on several devices in parallel.
In this situation, faster dedicated DSP processing subsystems offer a means to offload the tasks traditionally performed by the host processor. They also relieve the bus congestion that was typically found in earlier test systems. By backing each of its four dedicated RF receivers with a 500-MHz capture processor, for example, the ASL 3000RF achieves efficient parallel processing and multi-site RF applications (FIG. 5).
While DSP subsystems handle computationally intensive measurement calculations, the ASL 3000RF's host system can monitor results and provide a more user-friendly working environment. The system can provide test flows that emulate conventional testbench instrumentation. Rather than writing C programs to execute key test functions, engineers can select a standardized test for complex measurements like FFTs, EVM, or modulated S-parameters. Such built-in test functions remove potential differences in the implementation of complex tests. They also help to ensure consistency across organizations.
Aside from achieving consistency, companies must be able to quickly adapt equipment to changing requirements. They have to be able to easily create RF, analog, and digital test configurations to meet specific device test requirements. Furthermore, as standards evolve, RFIC companies depend on improved test architectures to preserve their significant investment in test capital equipment and program development and training. The emergence of upgradable test-system architectures promises to provide a cost-effective path for adapting and upgrading equipment as new test requirements emerge.
Right now, a new generation of WLAN chips is fueling an explosion of applications. This change will accelerate the demand for more differentiated WLAN devices. For the companies looking to get to market with more sophisticated WLAN chips, however, the wide bandwidth and high dynamic range associated with these devices still presents a significant challenge. The test capabilities of equipment designed for previous-generation devices proves insufficient for WLAN chips based on standards like 802.11a, HiperLAN2, 802.11b, and 802.11g. Because of the complex modulations prescribed in these standards, test measurements using sinusoidal stimuli cannot give RF designers an accurate picture of performance in real-world applications. As a result, RF designers have to resort to increasing guardbands. They are stuck trading yield for a reduced risk of device failures.
Newer test methods employ modulated signals that more faithfully emulate real-world signals. The more effective test systems even combine highly accurate instrumentation with more sophisticated architectures. For example, the ASL 3000F is based on distributed parallel-processing subsystems. It is therefore capable of acquiring data streams with high precision and at high sample rates from single or multi-site test setups.
Such devices can complete multiple, independent radio-frequency measurements from a single acquisition. Thanks to the inherent flexibility of this approach, companies can adapt WLAN test equipment to the exact configuration needed to take on a specific RFIC test challenge. As WLAN bandwidth, signal modulations, and bit rates continue to evolve, this same adaptability will help to preserve companies' investments in equipment, programs, and engineering experience.
For radio-frequency IC companies in particular, leading-edge WLAN devices present test challenges that demand improved test methods and architectures. By providing a measurement environment that is well matched to real-world applications, new platforms can deliver the necessary levels of accuracy and throughput. By providing a flexible, configurable test capability, these test systems also can provide cost-effective test solutions that retain their value in the face of evolving WLAN requirements.