Electronic Design
Implement Next-Gen Wi-Fi IP for 802.11ac Wave 3 SoCs, ASSPs

Implement Next-Gen Wi-Fi IP for 802.11ac Wave 3 SoCs, ASSPs

With the number of connected devices destined to be measured in the tens of billions in just a few years, more advanced Wi-Fi protocols will need to be employed, backed up by highly sophisticated and adaptable semiconductor technology.

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As shipments of both consumer and enterprise WLAN access points continue to rise, so too does the number of devices to which they need to connect. Thus, the ability of the former to keep pace with the latter is constantly being put to the test. With the number of connected devices soaring to the tens of billions in just a few years, more advanced Wi-Fi protocols will need to be employed, backed up by highly sophisticated and adaptable semiconductor technology.

WLAN Growth

Industry-analyst firm ABI Research predicts that consumer and enterprise WLAN access-point shipments will both see significant growth between now and the end of 2019, reaching 171.5 million and 25 million units, respectively. From an enterprise perspective, the advent of bring your own device (BYOD) is among the main drivers, with the popularity of cloud computing also contributing heavily.

From the consumer side, impetus is coming from heightened demand for continuous connectivity during the course of our daily lives. This entails, for example, using smartphones or tablets for downloading video content, accessing social-media sites, indulging in online gaming, and/or sharing photos.

In addition, the more widespread implementation of Internet of Things (IoT) equipment in the near future must be factored into the equation (through which, amongst other things, a plethora of different home- and building-automation functions will be enabled), plus greater proliferation of wearable technology. To address the challenges of this growth, it will be necessary to further unleash the potential of WLAN technology by deploying next-generation technologies based on the emerging 802.11ac Wave 3 Wi-Fi specification.

1. The CEVA Wave 3 software-defined-modem (SDM) architecture.

Currently, WLAN access-point implementations are primarily based on 802.11ac 4×4 technology. However, this is destined to become outdated as bandwidth requirements increase to address greater data-handling capacity. If Machina Research’s estimates are correct, then the average U.S. household will have 20 connected WLAN devices by the end of decade. All of these devices will need to connect to the same access point.

Meanwhile, it’s almost certain that enterprise WLAN infrastructure will be placed under still greater strain. Here, it’s likely that each access point will need to connect to an even larger number of devices. With a multitude of clients to support, enterprise access points will require more spatial streams than their domestic counterparts - 8×8 antenna configurations are therefore going to become increasingly commonplace, replacing the existing single and double antenna arrangements.

New WLAN Technology

The emergence of the 802.11ac Wave 3 specification will be pivotal in satisfying ever-soaring bandwidth demands. The specification supports twice the bandwidth of the previous generations—up to 160 MHz (while 802.11ac Wave 1 is restricted to 80 MHz). It also doubles the number of antennas by supporting 8×8 arrangements (whereas Wave 1 and Wave 2 are restricted to 4×4 arrangements). In addition, this Wi-Fi technology offers multi-user MIMO (MU-MIMO) functionality, which allows for a large number of device connections. 

2. Radio-interface unit architecture.

In an 802.11ac Wave 1 system, a 4×4 access point is only able to connect to 1×1, 2×2, 3×3 and 4×4 client devices one after another. This significantly limits throughput and network utilization, and doesn’t take full advantage of the 4×4 capacity available—particularly when connected to 1×1 client devices. In Wave 2 systems, a 4×4 access point can simultaneously talk to up to four 1×1 clients, with each of these clients receiving the signal from one of the four spatial streams. This ability to benefit from the 4×4 functionality leads to improved network utilization. Now, Wave 3 takes things a step further.

Access-Point Design Implications

OEM engineering teams tasked with developing system-on-chip (SoC) solutions for contemporary Wi-Fi applications must be able to create highly integrated solutions that are cost-effective, do not require too much board real estate, and are power-efficient. They must be aware of the characteristics that define the different access-point types needed for each industry sector, typically:

Enterprise access points: As mentioned above, because of the large number of devices that require connection, up to eight spatial streams will be needed.

Domestic access points: Representing the largest market opportunity in the coming years, these don’t need as much bandwidth as enterprise access points, though they’re likely to still need four spatial streams.

Low-cost mobile access points: Here, two spatial streams will normally suffice.

2. Radio-interface unit architecture.

OEMs don’t want to have to create different chips for each individual system design. It makes far more sense—from both engineering and commercial perspectives—to construct a versatile core technology that can be optimized to fit specific application criteria. Not only does this allow for best possible use of engineering resources, but it also ensures that OEMs can protect the investment made by delivering significant levels of scalability across multiple market segments. As a result, overall development costs can be minimized and risks are mitigated. One way to achieve this goal is through scalable software-defined-modem (SDM) IP.

Take, for example, CEVA's RivieraWaves Stream Wave 3 SDM architecture (Fig. 1). This connectivity platform combines all of the necessary hardware and software elements needed for next-generation Wi-Fi implementation. The platform is based on a hybrid approach that combines hardwired units with programmable digital-signal-processor (DSP) cores to deliver a mix of high performance, compact size and flexibility.

The platform comes with a reference control and processing software, creating a fully functional Wi-Fi modem. The scalable 802.11ac Wave 3 modem architecture on which it’s founded allows 160-MHz operation to be supported, and its antenna capacity can be scaled from 2×2 up to 8×8 MU-MIMO.

As they’re very computationally intense and not expected to change, critical signal-processing algorithms have been hardwired into dedicated logic to maximize performance. The hardwired units include the radio-interface unit (RFU), the time-frequency unit (TFU), the bit-processing unit (BPU), the QR decomposition unit, and the MAC-PHY interface unit. In tandem, Wi-Fi modem algorithms are implemented onto the DSP cores to assure that flexibility and facilitate alterations to the system.

4. Bit-processing unit architecture.

The radio-interface unit (Fig. 2) is a micro-coded state-machine that controls highly configurable processing blocks. The blocks significantly ease adaptation to specific RF implementations. The time-frequency unit (Fig. 3) is responsible for supplying the FFT/IFFT functionality that will facilitate the DSP loading process.

The bit-processing unit (Fig. 4) performs a series of bit domain operations. In receive mode, it deals with the de-interleaving, stream multiplexing, convolutional decoding, and some of the de-scrambling. Conversely, in transmit mode, it performs scrambling, convolution encoding, stream de-multiplexing, and some of the interleaving.

The smoothing unit filters the channel estimate in the frequency domain to reduce the estimation noise, which otherwise affects the channel coefficients estimate obtained from the preamble. As a result, it dramatically improves system sensitivity. The QR decomposition unit contributes to the equalizer computation, as well as the implementation of the SVD of the channel estimate needed to support the beamforming.

Finally, the MAC-PHY interface unit is responsible for the MAC interface and undertakes several operations. In receive mode, it prepares the Rx-Vector from the SIG fields and provides it to the MAC. While in transmit mode, it decodes the Tx-Vector from the MAC and presents contained information to the modem.

The software communicates with the hardwired units using registers and interrupts. Data exchanges between hardwired units and the programmable DSP core are accomplished via a dedicated memory-based interconnection using the DSP cores’ data memory resource.

Operational Example: 802.11ac 8x8, 8-Stream, 160-MHz Configuration

Figure 5 illustrates the capability of the SDM platform. It shows how two CEVA-XC4210 DSP cores can be used to implement an 8× 8 Wi-Fi MU-MIMO SDM supporting 160-MHz operation and eight spatial streams.

5. Overview of an 8×8: 8-160 architecture.

During operation, each data-symbol output from the RIU is pushed into the memory of the TFU hardware FFT, which is launched successively on each antenna. These FFT output samples are then processed by the DSP. The DSP core is specifically responsible for the phase tracking, MIMO equalization, and LLR computations. Finally, the soft-bits are provided to the BPU for de-interleaving and decoding.


Designing a next-generation 802.11ac Wave 3 software-defined modem (download)

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