Electronic Design

PCI Express IP Cores Target FPGAs

Lattice Semiconductor has introduced three PCI Express Intellectual Property (IP) cores in its ispLeverCORE portfolio. One of the new cores is optimized for the newly announced LatticeECP2M low-cost FPGA family. The core implements a single-chip PCI Express x1 endpoint solution with integrated SERDES that is ideal for high-volume, low-cost, and limited form-factor applications. Other new PCI Express x1 and x4 cores are available for the LatticeSCM FPGA family. These are suitable for system applications requiring the highest integration and performance. The IP cores are available within the IPexpress flow supported by the company's ispLEVER 6.0 Service Pack 1, or later, design tool suite.

The PCI Express solutions include not only new IP cores but new evaluation boards, demo software, and drivers. LatticeECP2M and LatticeSCM evaluation boards are both available in the PCI Express mechanical form-factor compatible with standard motherboards. The demo software uses the evaluation boards to demonstrate PCI express endpoint operation, including configuration, memory/register access, and simple tests. Demo drivers and API also are available for users who wish to extend the demo capabilities. The cores and evaluation boards have been tested against PCI Express version 1.0a specifications at the October 2006 PCI-SIG workshop, ensuring that Lattice's solutions are interoperable with existing PCI Express-supported systems.


The LatticeECP2M and LatticeSCM PCI Express solutions are available immediately.


The LatticeECP2M PCI Express core can be downloaded from the Lattice website for a no charge, time-limited evaluation within the IPexpress flow of the ispLEVER design tool. For information on prices, contact the company.


Visit www.latticesemi.com.

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