The “TWitt” converter shown features a forward converter transfer function and can operate effectively at high switching frequencies because it achieves zero voltage switching (ZVS) of all of its switches for all transitions (Fig. 1). Because of its high switching frequency capability, high efficiency, and simple architecture, it can provide very high power density. Another benefit is that it eliminates diode reverse-recovery effects, which are a problem in other ZVS converters, such as the popular ZVS phase-shift-modulated fullbridge converter. Due to the converter’s ability to eliminate reverse recovery, it can be operated without a snubber. (For more information on this circuit, check out the reference at the end of the article).
One of the shortcomings of the circuit is that it has both pulsating input and output currents similar to a continuous-mode flyback converter, but without the flyback’s right half plane zero. By adding a second coupled inductor or flyback transformer, the output current can be made nearly constant throughout the switching cycle, except during the brief switching transitions. With proper design of the added transformer, the output current ramp slope becomes approximately zero. For input voltages that differ from nominal input voltage, the current ramp is small but non-zero.
Figure 2 illustrates the new, two-transformer TWitt converter. The size of the second transformer (T2) is typically 30 to 60% of the size of the main transformer (T1), depending on duty cycle. The size of the series choke (LR) is 0.5 to 5% of T1, depending on circuit parasitics. The T1 transformer in Figure 2 is likely to be smaller than that in Figure 1 because the two transformers in Figure 2 share the load.
LR provides the key to zero-voltage switching. The energy stored in this small choke plus the energy stored in the leakage inductances of the two transformers provides sufficient energy to drive both transitions of all switches, including rectifiers, and energy to charge and discharge all of the circuit’s parasitic capacitances during the resonant transition. Part of the energy for each switching transition is supplied by the stored energy in one of the transformer’s primary windings, which reduces the amount of stored energy required by the series choke (LR) and the leakage inductances. However, the energy stored in the transformers is insufficient to complete the transition without some additional series inductance, due to the clamping of the primary circuit by the reflected output voltage. The converter operates using simple PWM control, with a short dead time between the on times of the two switches. When the upper switch (Q1) is turned on, T2 behaves like an ideal transformer.
The primary current in T2 has two components: the magnetizing current and the reflected secondary current. The current ramp in T2 is controlled by the open circuit inductance of the T1 primary winding (L1). The T1 transformer looks like a choke during this phase of operation because its secondary rectifier is reverse-biased while T2’s secondary rectifier is forward-biased. Note the transformers’ winding polarities in the figure. If the primary current I2 were to be held fixed, then the portion of the primary current that’s magnetizing current would increase and the portion that’s reflected secondary current would decrease.
By increasing the total T2 primary current at the same rate as the rate of increase in T2 magnetizing current, the reflected secondary current remains constant. When the secondary current remains constant, there’s no output inductor current ramp and, except for some minor sagging during the switching transitions, the secondary current remains at the same value throughout the cycle. As a result, the output filter capacitor value can be reduced when compared to a standard forward converter’s output filter capacitor, and output ripple and EMI are reduced when compared to the standard forward converter. With the circuit element values shown in Figure 2, the rms output voltage ripple is less than 0.1% of the output voltage.
The magnetizing current ramp slope in T2 is Vout/(N2L2), while Q1 is on. In this case, Vout is the sum of the output load voltage plus the rectifier forward voltage drop. The primary current ramp is (Vin − VCPRI − Vout/N2)/(L1 + LR). For the output current to be zero, these quantities must be equal: Vout/(N2L2) = (Vin − VCPRI − Vout/N2/(L1 + LR).
When Q1 is switched off, the energy stored in LR drives a zero voltage transition and briefly reduces the output current. For the Q1 turn-off transition to be zero voltage, it must be turned off very quickly, which implies an appropriate gate-drive circuit. After the body diode of Q2 is turned on by LR, the channel of Q2 is turned on at zero voltage and with zero switching power loss. During the switching transition, the load current is shared by the two transformers as one transformer’s current ramps down while the other transformer’s current ramps up. The resonant switching transition current slopes in the transformers are controlled by the voltage applied to LR and the value of LR.
During the state in which Q2 is on, the primary current in T1 is controlled by the open circuit inductance of the primary winding of T2, which is L2. In this half cycle, the rate of increase in magnetizing current in T1 is equal to the increase in total primary current in T1, so once again the output current ramp slope is zero.
The magnetizing current ramp slope in T1 is Vout/(N1L1) while Q2 is on. The primary current ramp is (VCPRI − Vout/N1)/(L2 + LR). For the output current ramp to be zero, these quantities must be equal: Vout/(N1L1) = VCPRI − Vout/N1)(L1 + LR). The requirement of volt second product balance in each magnetic circuit element forms three additional defining equations for steady-state circuit operation.
When Q2 switches off, the stored energy in LR and leakage inductances drive another resonant transition, turning on the body diode of Q1. Q1 is turned on at zero voltage very soon after its body diode begins to conduct, completing the switching cycle.
Obtaining near-zero current ramp slopes can be done by adjusting turns ratios and primary-winding inductances of the two transformers. The operating equations derived from the five equations described earlier for the Figure 2 converter are:
VCPRI = D Vin
Vout = Vin D(1 − D)/\[D/N2 + (1 + LR/L1)(1 − D)/N1\] and
L2 = L1(N1/N2)D/(1 − D)
where VCPRI is the primary capacitor voltage, Vin is the input voltage, D is the duty cycle, Vout is the output voltage, N2 is the secondary to primary turns ratio of T2, N1 is the secondary to primary turns ratio of T1, L1 is the primary open circuit inductance of T1, and L2 is the primary open circuit inductance of T2. The input-to-output transfer function is similar to the asymmetrical half-bridge designs and must be operated below 50% duty cycle. That’s because the control-to-output transfer function goes to zero and changes sign at a duty cycle of 50%.
A reliability advantage of these converters is that there are no staircase saturation effects in the transformers, which are current-fed, have lumped or distributed gaps for energy storage, and don’t require core reset. Another advantage over the single-ended forward converter is that the switches are clamped to the input supply rails so users might be able to use either smaller switches or reduce switch conduction losses by choosing lower voltage switches. A distinct disadvantage is the requirement of a second primary high-side switch, which limits this design to high-performance or high-density applications. For higher power, the circuit can be bridged simply by adding two more switches and increasing the voltage rating of the primary capacitor. For bridging purposes, the primary capacitor capacitor isn’t returned to ground but connected to a second pair of switches, which effectively doubles the input voltage applied to the converter. Because of the soft switching, low ripple, and the elimination of diode reverse-recovery effects, the converter is a good candidate for regulated high-voltage power supplies.
Author’s note: The Figure 1 circuit is patented and shown as an example of prior art. The new circuit represented and advocated by this Idea For Design is shown in Figure 2 and represents a circuit that overcomes shortcomings of the prior art as indicated in the article. The author will make no patent claim on the Figure 2 circuit. To the author’s knowledge, no patent has been granted or is pending on the Figure 2 circuit, although it’s quite likely patentable.
Reference:
Wittenbreder, E.H., “Zero Voltage Switching Pulse Width Modulated Power Converters,” U.S. Patent 5,402,329, Dec. 9, 1992.