Today’s automobiles and future self-driving cars will need a tremendous amount of computing power while meeting strict safety standards. Multicore and many-core solutions will support the software necessary to provide safe and secure transportation systems. In particular, a number of these applications require predictable, real-time performance.
Kalray’s “Coolidge” Massively Parallel Processor Array (MPPA) chip contains up to 160 time-predictable, 64-bit cores for ASIL-B automotive applications. It also meets the ISO 26262 standard. Its network-on-chip (NoC) architecture employs a 2D-wrapped-around torus communication structure to link the compute clusters and peripherals (Fig. 1). A single chip will deliver nine teraFLOPS (TFLOPS) of performance while still allowing the system to handle real-time applications.
1. Kalray’s MPPA network-on-chip uses a 2D-wrapped-around torus communication structure to link the compute clusters and peripherals.
The architecture is similar to other many-core solutions. It groups cores in compute clusters connected by the NoC to adjacent clusters and the peripheral banks on the periphery of the chip. Peripherals include interfaces such as PCI Express and automotive communication interfaces. Some of the banks also feature timers and general-purpose interfaces like UARTs, I2C, and SPI.
The NoC provides a time-predictable communication system that’s key to distributing the number of cores to safety-related applications. The network provides high throughput while keeping the latency low.
In addition, NoC eXpress (NoCX) interfaces can be used to link multiple chips together in a larger computing array. NoCX is also a way to link the chips to FPGAs and other external coprocessors.
Like numerous other many-core solutions, the MPPA can be programmed using conventional tools such as C and C++ compilers as well as OpenCL. This approach allows developers to use standard libraries like OpenCV and OpenVX. Likewise, its real-time support makes it possible to use operating systems like AUTOSAR.
2. The MPPA Dev 2 is an all-in-one PC-based development station for the Kalray MPPA platform.
Kalray provides a number of MPPA development platforms. The MPPA Dev 2 (Fig. 2) is an all-in-one, PC-based development station. There’s also the MPPA EMB2, a small-form-factor version of the MPPA Dev 2, and the MPPA Box2 embedded prototype platform.
Other many-core processor solutions include Intel’s Xeon Phi and Mellanox’s Tilera. These platforms are being using in non-automotive applications. Kalray’s platform would be applicable to those application areas as well.