EE Product News

The DS91C176, DS91D176, DS91C180, and DS91D180 multipoint LVDS transceivers exploit balanced, controlled edge rates of 2 ns and feedback-enhanced outputs that maintain constant amplitude over a wide range of load conditions. Reportedly, this enables the highest noise margins to date in backplanes employing clock frequencies up to 100 MHz. Compliant with EIA/TIA-899 standards, the devices support up to 32 loads, data rates to 200 Mb/s, and are suitable for clock-distribution duties in ATCA environments. Available in 8-pin SOIC packages, the DS91C176 and DS91D176 half-duplex transceivers accept LVTTL/LVCMOS signals and convert them to differential M-LVDS levels. Receiver inputs convert LVDS, B-LVDS, M-LVDS, and LV-PECL to 3V LVCMOS signals. The DS91C176 receiver includes an M-LVDS type-2 failsafe circuit with a 100-mV offset to ensure a low output for short- and open-input conditions. An evaluation board, the DS91D176TEVK, is available for the DS91D176. The DS91D180 and DS91C180, in 14-pin SOIC packages, integrate full-duplex multipoint LVDS line drivers and receivers. Mirroring the DS91C176, the DS91C180 receiver provides an M-LVDS type-2 failsafe circuit with a 100-mV offset. Pricing for each device is $1.85 each/1,000. NATIONAL SEMICONDUCTOR CORP., Santa Clara, CA. (800) 272-9959.


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