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9U VME Board Packs In 16 G4 AltaVec PowerPCs

  • Sky Computers
    (978) 250-1920;
  • Bigger is sometimes better, and VME 9U has its uses. In this case, one 9U board can pack in up to 16 G4 PowerPC compute platforms, each with its own local memory. The processors are linked via an on-board switch fabric for high-performance multiprocessing. The board integrates four compute clusters of Merlin MPC7400 daughter cards. Each card holds four G4 PowerPC compute nodes. The SKYchannel switch fabric supports an overall data transfer rate of up to 960 MB/s. The combined G4 processors, each with its own on-chip AltiVec vector processor, deliver a processing peak of 42 GFLOPs. Up to 16 of the boards can be combined into a massive multiprocessing array, with 256 processor nodes, all interconnected into a common SKYchannel switch fabric. For really high performance, up to 16 chassis can be combined, each with 16 9U VME boards.

    The 9U system board uses an Intel i960 RISC CPU as the system and housekeeping processor. The Merlin daughter cards hold up to four 33-MHz G4 PowerPC chips. Each G4 is supported with an off-chip, 2-MB cache (333-MHz interface) and up to 256 MB of SDRAM (83.3-MHz interface). The SKYchannel crossbar links all of the processors together into a hierarchical switch fabric. The 9U SKYbolt board supports two external SKYchannel links and an FPDP port. Sky supplies a full set of software tools, including vector and communications libraries, code development tools, compilers/debuggers, and run-time executives, plus host operating-system interfaces (So-laris, VxWorks, and WindowsNT). Pricing starts at $75,000 for a 9U SKYbolt board.

    Add USB And LCD Controller In One Chip

  • Epson R&D
    (604) 275-5151;
  • USB has become a de facto standard for the desktop as well as for embedded and portable applications. USB connectivity enables devices to be easily connected to a USB host. For low-cost applications, a standalone USB controller may take up too much space. Epson's USB/LCD-controller chip helps by combining functions. The S1D13A03 integrates a color/monochrome 2D accelerated LCD controller with a USB 1.1 client. Designed for portable applications, the LCD controller includes 112 kB of SRAM display memory. The LCD controller incorporates Epson's SwivelView technology, which allows for 90°, 180°, or 270° rotations of the display for viewing. Prices start at $8 each (10,000-lot quantities) in a TQFP package.

    16-bit RISC Integrates DSP, High-Temp Operation, 256-kB Flash

  • STMicroelectronics
    (781) 861-2650;
  • Automotive applications have shifted to flash memory and higher-performance microcontrollers, especially for motor-control and drive-train functions. STMicroelectronics' latest device targets these applications, delivering a 16-bit RISC engine with built-in DSP functionality and 256 kB of flash memory. The ST10F269 builds on the ST10 RISC core initially developed by Siemens (the 166), and now by Infineon. This RISC-like CPU has a four-stage pipeline. It also has DSP functions, including a single-cycle (pipelined) MAC cycle with a 40-bit accumulator, complete with concurrent X and Y memory access.

    Running at 40 MHz, the ST10F269 delivers 20-MIPS peak performance. Its temperature range is 40°C to 125°C. The chip supplements the CPU with 2 kB of RAM and 10 kB of XRAM. Peripherals include two CAN bus ports (rev. 2.08), a watchdog timer, an on-chip oscillator and PLL, an external memory bus (multiplexed or nonmultiplexed), an eight-channel interrupt controller, two timer units (five timers each), a 16-channel 10-bit analog-to-digital converter (ADC), a four-channel PWM, two serial ports, and up to 111 digital I/Os. The flash memory is organized into seven banks and supports dynamic loading (good for 100,000 cycles). The chip comes in a 144-TQFP and costs $20 in 10,000-unit lots.

    Controller Drives 32-Bit, 66-MHz, Hot-Swap PCI Buses

  • PLX Technology
    (800) 759-3735;
  • PCI is now moving up to 66-MHz, doubling throughput over its 33-MHz beginnings. PLX's PCI9056 delivers a 32-bit, 66-MHz PCI bus master controller. The chip supports multiple PCI bus forms, including CompactPCI, PCI, and PMC buses. Additionally, the PCI controller has been designed to provide a PCI connection for the MPC850/860 PowerQUICC communications controllers. A chip-to-chip strapping configuration allows two PCI9056s to provide two distinct PCI bus ports to the PowerQUICC controller.

    The controller meets the PICMG 1.2 r2.0 Hot Swap and the PCI Hot Plug r1.0 standards and supports the Programming Interface 0 (PI = 0). It incorporates bias voltage and early power support for hot swapping as well as an option to suppress PCI target retries during chip initialization. It also supports PCI power management to meet the PC 2001 System Design Guide Requirements for Microsoft Windows certification.

    Additionally, PLX supplies an RDK design kit for the PowerQUICC-based designs. The kit includes a 6U CompactPCI board, the PLX hardware development kit, and the PLX software development kit, for both hardware and software support for PCI implementations. The PCI 9056 comes in a 256-pin FPGA and costs $26.20 each in 100-unit lots.

    ARC Core Boasts 32-Bit RISC, DSP, In 10 kgates

  • ARC Cores
    (408) 360-2120;
  • Extensible RISC cores are very attractive for developers building SoCs, especially for handhelds and portables. They can put in only what they need and add special features to save memory and raise specialized processing capability. ARC Cores is launching a new extensible core, the Tangent A4. The basic core is a 225-MHz RISC CPU that fits into less than 0.2 mm2 and dissipates less than 0.15 mW/MHz (at 1.8 V, 25°C) in a TSMC 0.18-µm process. Extensions include caches, DSP MAC and dual memory access, instruction extensions, and a configurable interrupt system.

    The core has a cleaner four-stage pipeline with an improved cache interface and faster forwarding paths for immediate data and results. The two-stage, writeback data cache supports higher frequencies and saves power. It's configurable with one-, two-, or four-way set allocation, line locking, replacement algorithms, and a flush buffer. The DSP extensions can implement 16-by-16 or 24-by-24 MPY, XY dual local memories, and an enhanced min/max function. A development platform, the ARCform, includes a configurable compiler, a debugger, profiling tools, a cycle-accurate simulator, and a Signal Visualization tool that plugs into the MetaWare SeeCode C debugger. The core supports Vx-Works, MQX, Nucleus, ThreadX, and VxWorks operating systems.

    Device Combines 64-Bit MIPS RISC CPU With PCI Controller

  • Toshiba America Electronic Components
    (949) 455-2000;
  • PCI has become a de facto standard bus and a ubiquitous embedded interconnect. Embedded processors are beginning to incorporate a PCI bus controller on-chip for easy connectivity. Toshiba's TMPR4927 integrates a 200-MHz, 64-bit MIPS RISC CPU with a 32-bit, 66-MHz PCI controller (rev. 2.1). The chip delivers 64-bit wide RISC processing power with PCI throughput, a combo that's useful for high-performance peripherals and dataflow applications like communications and networking.

    The 64-bit MIPS CPU implements the MIPS I, II, and II ISA, as well as the MIPS IV prefetch and MAC instructions. It has 32-kB I and D caches, with MMU support. The DSP MAC instructions execute in one pipelined cycle (of a five-stage pipeline). On-chip support includes an interrupt controller, two UARTs, a parallel port (16 I/Os), a four-channel DMA controller, an SDRAM controller, and a 24-bit timer. The chip comes in a 420-pin TBGA for 3.3- and 1.5-V operation (3.3-V I/O and 1.5-V internal voltages). Power consumption is less than 1.0 W. The processor chip has "doze" and "half" reduced power modes. Linux, Windows CEW, VxWorks, and Red Hat eCOS are supported by the TMPR4927. The CPU costs $35 in 10,000-unit lots.

    8051 Sports 64-kB Flash And 2-kB RAM While Doubling Core Speed

  • Philips Semiconductor
    (800) 234-7381;
  • The 8051 has shifted to faster execution and to flash memory. Philips' new 80C51 does both. It integrates a 2x faster 8051 core (six stages instead of 12) with up to 64 kB of flash memory. The microcontroller is downward compatible and will execute existing, slower 8051 code. The flash memory lets designers change their code design before target installation, or dynamically on the target systems. For dynamic flash programming, the CPU runs from functions in the boot ROM while loading the main flash memory. The P89C66x comes with 16, 32, or 64 kB of on-chip flash program memory. The chip also has 2 kB of RAM, an I2C serial port, four 8-bit I/O ports, three 16-bit timers, a programmable counter array, a watchdog timer, and an on-chip oscillator. This is a 4.5- to 5.5-V part that runs at up to 20 MHz for the six-clock CPU and to 33 MHz for the 12-clock CPU. It comes in a 44-pin PLCC/LGFP.

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