High-speed serial interfaces such as PCI Express and USB are becoming more familiar to developers and users, even as the standards push into their third and fourth generations. New releases usually highlight higher throughput, but the more subtle features often have the real impact in new designs.
These newer standards address issues such as security, quality of service (QoS), and distance. Backward-compatibility tends to be the norm as well, and this trickles through related standards built on the serial interfaces, such as ExpressCard’s use of PCI Express and USB (Fig. 1).
While higher-performance processors and chips easily tackle speed issues, speed remains a challenge in more embedded, single-core microcontrollers at the low end of the spectrum. Here, parallel bus interfaces from LPC to PCI are likely to remain because the chip technologies employed can’t handle the higher speeds. Still, slower versions of existing serial interfaces such as USB and Ethernet will enjoy the compatibility with their higher-speed siblings.
PCI will never die, though PCI Express has effectively relegated it to embedded or legacy applications (Fig. 2). PCI Express 3.0 pushes data at 8 Gtransactions/s, effectively doubling throughput over PCI Express 2.0 by removing overhead. It will be interesting to see where PCI Express 4.0 goes, but for now, PCI Express 3.0 will deliver at the high end.
In the meantime, PCI Express 2.0 will dominate the year, seeing that plenty of products are already in the chute. This includes more use of External PCI Express for linking systems. Connecting off-board systems using PCI Express without using a backplane is another opportunity. PCI Express on the backplane dominates systems such as blade servers, especially as I/O virtualization moves quickly from theory into practice.
SuperSpeed USB (USB 3.0), the next generation of USB, arises to match the high-performance peripheral requirements to come, especially with hi-def content and high-capacity storage. It will take a while for USB 3.0 to have an impact, but the availability of cores from the likes of Synopsys should speed adoption.
USB will continue to be the interconnect of choice for peripherals with USB 2.0 remaining dominant, but other uses are becoming more popular. USB as an in-box peripheral interconnect is becoming more common as embedded developers get more comfortable with USB stacks.
SATA/SAS For Storage
SATA 3.0 will bump throughput to 6 Gbits/s. SAS will follow suit. Faster drive throughput will be handy for high-performance SAS drives as well as flash drives. But like the other third-generation standards, this year will offer a glimpse of 3.0.
In the meantime, SATA 2.0 and its SAS counterpart will remain the mainstay, with more microcontrollers gaining SATA support (Fig. 3). Greater use of eSATA, especially in consumer products, should allow for modular storage expansion, though USB will continue to challenge it.
More On The Backplane
So how will these new standards compare to the rest of the backplane for technologies like InfiniBand, Serial RapidIO, and Ethernet? InfiniBand and Serial RapidIO already established their niches in high-performance computing (HPC) and communications. Ethernet and PCI Express tend to be complementary in these niches in addition to covering most of the remaining areas. This state of affairs will continue in 2009 with few, if any, surprises.
Serial Stacking Success
A bigger question will be whether stackable architectures (e.g., StackableUSB) and the PC/104-related standards that address point-to-point interfaces (e.g., PCI Express, USB, and SATA) will take off. Last year was for standards. This year, we will see products.
Get comfortable watching the almost lockstep improvement of different standards to persist as long as the same serializer-deserializer (SERDES) technology employed by the various high-speed technologies doesn’t change.