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Network Processor Design Suite Adds New Features

StrataNP 2.1 design suite, the latest version of the company’s StrataNP software development solution for the Intel IXP1200 network processor, includes enhancements to existing features, support for ATM, and support for Intel IXA Portability Framework Control Plane APIs. The suite is comprised of two modules. The core module combines a graphical design environment with mapping capabilities, application designs, NPU platform configuration utilities, reusable components, and a library management system. The IXP1200 network processor plug-in module adds the IXP1200 synthesizer, system analyzer, and interface to the Intel SDK and Transactor. Code development is via the graphical visualization tool—users select software components from the library and bind them together. In addition to support for IXP1200 microAce components, the new version includes support for microBlock components and the ability to group components to any of the six IXP1200 microengines. The company is also releasing the StrataNP 2.1 Enterprise Edition, which allows enterprise-wide sharing of libraries, version control for all design elements, and support for automatic updating of design elements. For further information, contact CONSYSTANT, Kirkland, WA. (425) 739-9927.


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TAGS: Intel
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