EE Product News

2-Mb Synchronous SRAMs Are For Cache Or Buffer Uses

For applications such as cache or buffer memory, the µPD432836L pipeline burst synchronous SRAM has a 64 Kword x 36-bit configuration and operates by synchronizing the clock input. With a top operating frequency of 250 MHz and 3.9-ns clock access time, the devices are also available in 225-MHz (4.34 ns), 200-MHz (4.9 ns), 183-MHz (5.3 ns), 175-MHz (5.3 ns) and 167-MHz (5.3 ns) versions. The devices support interleaved and linear burst operation; modes are switched by a burst MODE select input pin. Package is a 100-pin TQFP.


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TAGS: Digital ICs
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