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288 Mb RLDRAM II Devices Set To Sample

The company's first 288-Mb, reduced latency DRAM II (RLDRAM II) device operates at 400 MHz and, via an eight-bank architecture and 36-bit interface, achieves a peak bandwidth of 28.8 Gb/s. In addition to low latency, the device features a random cycle time of 20 ns, on-die termination, multiplexed or non-multiplexed addressing, on-chip delay lock loop, common and separate I/O, programmable output impedance, and a 1.8V core. The devices are available in a standard, 144-ball FBGA package measuring 11 x 18.5 mm and are sampling now. MICRON TECHNOLOGY, INC., Boise, ID. (208) 368-4400.


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TAGS: Digital ICs
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