Sandy Bridge chipset architecture
Sandy Bridge with P67 chipset
Intel may not be out a billion dollars (see Bad Transistor Causes Billion Dollar Mistake). Most of the fallout will be mitigated through a combination of a fast response and selective shipments of the existing chip according to Intel's latest announcement. The key to the latter was the incorporation of not one but two SATA controllers in the hub.
The state of affairs started when a bug in the 4 channel, 3 Gbit/s SATA controller in the Sandy Bridge P67 chipset (Fig. 1) was discovered. It seems this SATA controller subsystem had a transistor with a bad bias that would eventually cause a failure of the subsystem. There was never a problem with Sandy Bridge (Fig. 2), Intel's 32nm second generation Core processors. The P67 chipset just started shipping recently but a flood of motherboards had already hit the street.
It looks like Intel will be quick out the gate with the repair C stepping version of the chip. This will be great news to most vendors that will simply wait for the new chips that should arrive later this month. It slows down but does not remove those motherboards from production.
The shipments of existing chips will be going to vendors that can show they will be utilizing only the 6 Gbit/s SATA controller that was unaffected by the problem transistor. This is likely to be the case for most systems since it is rare to have more than two drives in this class of device. It is also unlikely that given this choice that a designer would utilize the 3 Gbit/s interface versus the 6 Gbit/s interface. This means embedded devices and selective workstations could continue to use the B stepping chip that has the problem with the 3 Gbit/s controller.
If Intel can deliver quantity of the newer chip fast enough then motherboard vendors are likely to wait. The alternative is actually simple although more limiting to the customer. A BIOS change to remove the 3 Gbit/s SATA controller and not populating the matching four SATA connectors would be all that is necessary to ship a usable motherboard where the user could not encounter the problem since only the 6 Gbit/s interface would be all that is available for use. Look for motherboards with this earlier chip to be either destoryed or put up for sale with a modified BIOS. There could be some nice bargains in a couple weeks.
Intel was lucky that it had two SATA controllers in the system. It also highlights the advantage of redundancy in a design where a degraded system is still a viable alternative. Developers should keep these kinds of issues in mind when designing new chips. Redundancy is already commonly used in flash memory.
Intel is likely to come out of this episode with little more than a tarnished image although its quick and forthright response is a definite plus. There will be costs associated with motherboard recalls, delayed deliveries and tech support hassles but it is likely to be less than the original billion dollars projected when the problem was first discovered. It will not be cheap but it may be no more than a bump in a corporate financial report by the end of the year.