Microcontroller Expands 80C51 Linear Address Range To 16 MB

June 1, 2001
The 87C551Mx2 microcontroller family breaks the 64 KB barrier for 8-bit 80C51 controllers by supporting up to 16 MB of on-chip linear addressable memory. The device is the first in a line of large on-chip memory devices based on the firm's 51MX core.

The 87C551Mx2 microcontroller family breaks the 64 KB barrier for 8-bit 80C51 controllers by supporting up to 16 MB of on-chip linear addressable memory. The device is the first in a line of large on-chip memory devices based on the firm's 51MX core. The 51 MX combines an increase in on-chip program and data memory together with high-level C language performance enhancements. Full binary object code compatibility is maintained, allowing design engineers to re-use existing 80C51 program code.
The 87C51MC2 is available with 96 KB of one-time programmable (OTP) memory and 3 KB of RAM and the 87C51MB2 comes with 64 KB of OTP and 2 KB of RAM. Both devices operate from a 2.7V to 5.5V supply. Housed in a 44-pin PLCC package, pricing in lots of 500 is $4.35 for the P87C51MC2BA and $3.95 for the P87C51MB2BA.

Company: PHILIPS SEMICONDUCTORS INC.

Product URL: Click here for more information

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