Superior clocking options, a full PLA and the firm's Fast Zero Power technology are all inherent in its new generation of XPLA3 CoolRunner CPLD devices. The first family member, the PZX3256 is a 256-macrocell device and is followed by 192, 128 and 64-macrocell devices. The XPLA3 architecture consists of multiple logic blocks interconnected by a single level ZIA. Each logic block contains a full 36 x 48 PLA, enabling the macrocell to use only the product terms it needs. Design changes can be made by simply allocating more PLA product terms to the macrocell in need. The XPLA3 family incorporates PCI-compatible I/Os, has a 3.3V power supply with 5V tolerant I/Os and operates from 2.7V to 3.6V. Software support is available from third parties and from the firm directly.