> A new consortium will pursue industry standards for easier integration of semiconductor intellectual property (IP) and IP tools. The consortium, named Structure for Packaging, Integrating and Reusing IP within Tool-flows (SPIRIT), will focus on standards for describing and packaging IP. ARM, Beach Solutions, Cadence, Mentor Graphics, Royal Philips Electronics, STMicroelectronics, and Synopsys are the founding members. Visit www.spiritconsortium.com.
> Cadence and Silicon Metrics are teaming to produce nanometer-ready delay models based on extensions to the Liberty model format. The effective current source models can be created by Silicon Metrics' SiliconSmart library characterization tool and used by Cadence's SignalStorm nanometer delay calculator, which is the common delay-calculation engine in Cadence's Encounter platform. The models provide accuracy that's often within 2% of Spice models. They also model the IR-drop impact on delay that's a major influence on timing at 180 nm and below. For more, visit www.cadence.com and www.siliconmetrics.com.