The latest revision of austriamicrosystems’ analog/mixed signal high performance process design kit (“HIT-Kit”) is now available for its 0.35-µm CMOS, high-voltage CMOS, and SiGe-BiCMOS specialty technologies. Based on the latest version of Cadence’s Virtuoso custom design platform (IC 6.1 release), the HIT-Kit v4.0 is said to significantly improve time to market for products in the analog/mixed-signal arena. The comprehensive design kit includes highly accurate simulation models and flexible Pcells.
The HIT-Kit v4.0 supports austriamicrosystems’ 0.35-µm process technologies C35 (CMOS), S35 (SiGe BiCMOS) and H35 (High-Voltage CMOS). It includes silicon-qualified digital, analog, and RF library elements as well as fully characterized simulation models for a large set of simulators, extraction and verification run sets, and automatic layout device generators.
All I/O structures within the design kit are silicon-validated and meet the military ESD and JEDEC latch-up standards with I/O pads designed to surpass 2 kV (H35 I/O pad cells only) HBM and 250-mA latch-up immunity. In C35 technology, the total I/O libraries consist of more than 1800 cells supporting 3.3-V and 3.3-V/5-V designs. The specialty high-voltage CMOS process H35, with its isolated libraries, offers even more than 2400 core and periphery cells.
The HIT-Kit v4.0 supports the RedHat EL 3.0, EL 4.0 and Sun Solaris 8, 9, and 10 operating systems. Contact austriamicrosystems directly for pricing and delivery information