ITC concludes successful week in Seattle

Seattle, WA. The International Test Conference concluded last week with participants in general upbeat about the events, including panels, keynote addresses, technical sessions, tutorials, workshops, invited speakers, and exhibits, including the exhibit-hall corporate forum. “It was a homerun, said Michael Purtell, general chair, saying he’d had positive feedback about the location of the conference in an urban location. He said the ITC Steering Committee appreciated the strong support and outreach of the IEEE Seattle Section and in particular of M. Soma of the University of Washington. 

Purtell noted that locating the conference in Seattle entailed risks, with fewer potential attendees within driving distance, compared with last year’s location in Southern California. Consequently, the committee had not wanted to make a multiyear commitment to Seattle, and the ITC will return to Anaheim in 2015. However, he said, he expected the committee would definitely reconsider Seattle for future conferences.

Purtell cited some particular innovations in the program this year, including the lectures and invited-speaker format spread throughout the program and a new firing-line format at the end of each 20-minute technical presentation, in which an expert in the topic initiates 10 minutes of questions and answers. Purtell also noted that the conference had an added emphasis on MEMS this year.

As previously reported, ITC got off to a rousing start Monday evening with a lively discussion on analog DFT. Tuesday morning, keynote speaker Aart de Geus, chairman and co-CEO of Synopsys, looked at the past and future of EDA and test, predicting that humans will become significant components of devices under test. And in a Thursday morning keynote address, Patrice Godefroid, a principal researcher at Microsoft Research, looked at software test and bug fixes for the 21st century. (Million dollar bugs will get found and fixed, but ten dollar ones probably won’t, was my takeaway from the talk.)

On the new products and technology front, Synopsys offered new tools for finding FinFET defects and testing and repairing embedded flash. ASSET InterTech highlighted seamless interoperability between ASSET InterTech tools and Mentor Graphics’ Tessent products for the IEEE P1687 Internal JTAG (IJTAG) embedded instrumentation standard.

Also exhibiting JTAG-based products and technologies were GOEPEL Electronics LLC and JTAG Technologies.

SL Power Electronics exhibited its line of power supplies targeted at test and measurement applications, for which specs such as common-mode noise are important. TDK-Lambda was also on hand to exhibit power supplies.

In addition, Astronics exhibited a robotic functional electromechanical test system that tests commercial airliner passenger-cabin lighting systems. Astronics also highlighted—via video—a massively parallel semiconductor test and burn-in system.

Also exhibiting burn-in and test systems were Aehr Test Systems and Micro Control Co.

Aries Electronics exhibited its lineup of high-temperature and burn-in test sockets, high-frequency test sockets, and Connect-a-Chip line of intelligent connectors. Ironwood Electronics also exhibited sockets, including 40-GHz models for BGA and QFN packages.

Optimal+ highlighted its Manufacturing Intelligence systems, noting that the company expedites the delivery of 15 billion chips annually. Syntricity featured its dataConductor, a scalable platform that can handle massive data growth through cloud-based technologies.

Several companies, including Chroma, Marvin Test Solutions, Roos Instruments, and SPEA America displayed ATE systems or modules such as PXI cards that can be designed into ATE systems.

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