Available On-Demand Now!
Originally Broadcast: Tuesday, April 23, 2019
Webinar Type: Webinar Discussion
Duration: 30 Minutes
In this webinar, SiFive President and CEO Dr. Naveed Sherwani will introduce and explain the benefits of RISC-V and will give an overview of SiFive’s core, silicon, and ecosystem offerings. Naveed will answer detailed questions on the benefits of RISC-V implementations and SiFive’s unique cloud based design platform. Naveed will be in the hot seat regarding competitive positioning and the current state of development.
Dr. Naveed Sherwani, President and CEO, SiFive, Inc.
Dr. Sherwani has over 30 years of experience in entrepreneurship, technical engineering and general management. Dr. Sherwani currently serves as President and CEO of SiFive, a fabless company which is leading the RISC-V revolution. Dr. Sherwani started his first company, when he was only 18 years old. He has founded and co-founded multiple companies. Prior to joining SiFive, he founded PeerNova, a company focused on technology solutions based on blockchain technology. Dr. Sherwani served as Chairman, President and CEO of PeerNova. Prior to PeerNova, Dr. Sherwani co-founded Open-Silicon, a leading provider of ASIC solutions. Under his leadership, Open-Silicon designed over 300 ASICs. Prior to Open-Silicon, as the founder and General Manager of Intel Microelectronics Services, he pioneered Open methodology for ASICs. He also founded Brite Semi, a leading ASIC solution provider in China/APAC. He has served on the boards of various companies, including Touchstone Semiconductor, and Integration associates (sold to Silicon Labs). Dr. Sherwani worked at Intel for nearly a decade, where he co-architected the Intel microprocessor design methodology and design environment used in several microprocessors and received the prestigious Intel achievement Award in 1997. Dr. Sherwani is a noted author having authored several books and over 100 articles on various aspects of VLSI Physical Design Automation and ASICs. Dr. Sherwani served as a Professor at Western Michigan University, where his research focused on ASICs, EDA, Combinatorics, graph algorithms and parallel computing. He received his Ph.D from the University of Nebraska-Lincoln.