Date: Tuesday, February 05, 2019
Time: 2:00 PM Eastern Standard Time
Event Type: Live Moderated Talk
Duration: 30 Minutes
PAM4 is moving into the mainstream with 50G electrical lanes and both 50G and 100G optical lanes. Now with both design and the production experience of early 400G products we’re gaining better insight into what works, what doesn’t, and what is still in process.
This in-depth discussion on technologies and techniques for PAM4 100G/400G testing – some electrical, more optical - will help you accelerate your own product development and maximize your manufacturing test efforts. We will discuss:
- The measurements: electrical and optical go directions have split and use different methods entirely – why?
- Measurement pattern is SSPRQ...But nobody uses it?
- Is real-time oscilloscope a practical tool for PAM4 or do you have to use a sampling (Equivalent Time) oscilloscope instead?
- PAM4 measurement surprises: jitter and noise are different everywhere.
- TDECQ measurement: result is a number…what to do if I fail? What is inside the number?
Domain Expert, High Speed Serial Data
Pavel Zivny is a communications measurements domain expert with the high performance oscilloscopes group of Tektronix. Pavel holds a MSEE and has worked in numerous design and engineering positions. He has been granted a number of oscilloscope related patents, has authored industry articles and papers, and represents Tektronix in high-speed serial data standards committees.
Domain Expert, PCIe
Dan Froelich has joined Tektronix as its Director of System Engineering. For the prior 18 years Dan worked as an Intel engineer and architect focused on specification and compliance test methodology development for USB and PCI Express standards. Dan served as co-chair of the PCI-SIG electrical workgroup and technical editor for the electrical specification for the PCIe 4.0 and PCIe 5.0 specification development. Dan also served as chair of the PCI-SIG Card Electromechanical (CEM) workgroup and technical editor from 2005 to 2018 covering the PCI Express 2.0, 3.0, 4.0 and early 5.0 CEM specification development. In addition, Dan served as co-chair of the Serial Enabling (Compliance Program) workgroup from 2007 - 2018 and served as technical editor and technical lead or developer on many of the test specifications and tools used by the PCI-SIG compliance program. Dan also won an Intel Achievement Award as the overall technical lead on the USB 2.0 industry compliance program and wrote the USB 3.0 hub and isochronous protocol specifications. Dan Froelich graduated with honors and high distinction from Harvey Mudd College in 1996 with a BS in Physics. Dan holds 6 US patents with several more applications pending.
Coherent and Electrical Networking Segment Lead
Heike Tritschler is a Technical Segment Lead at Tektronix responsible for Coherent and Electrical Solutions. Heike has held various positions with Tektronix during her 8 years with the company, including Marketing Manager and Sales for Bert Products. Heike's extensive background in technology marketing and engineering includes positions with Infineon, Picolight, JDSU/Lumentum and Picosecond, as well as a Bachelor degree in Engineering from Fachhochschule, Furtwangen.