The shift from 12-V supply rails to 48-V power systems is pushing power levels under the hood to new highs. But it opens the door to a unique set of issues that extend to xEV thermal design.
Mostly-Analog editor Andy Turudic takes a look at the original 1963 ISSCC paper that described the world’s first CMOS process with planar P- and N-type MOSFETs.
