Portability Concerns Create Need for Battery-Based ICs

March 1, 2002
Analog and mixed signal ICs are intended to control battery charging or provide regulation of battery power for portable equipment.

Analog and mixed signal ICs are intended to control battery charging or provide regulation of battery power for portable equipment. Two examples are included here, the ADP3806 that controls Li-Ion battery charging and the LTC1879 intended for use with cellular phones, portable computers, and wireless modems.

The ADP3806 from Analog Devices is a complete Li-Ion battery-charging IC. There are three versions of this device family: the ADP3806-12.6 guarantees a final battery voltage of 12.6V to 16.8V ±0.6%, the ADP3806-12.5 guarantees 12.525V to 16.7V ±0.6%, and the ADP3806 uses two external precision resistors to set the battery voltage.

Combining a bootstrapped synchronous switching driver with programmable current control and accurate final battery voltage control, the ADP3806 implements a constant current, constant voltage (CCCV) Li-Ion battery charger. High accuracy voltage control is required to safely charge Li-Ion batteries, which are typically specified at 4.2V ±1% per cell. A typical notebook computer battery pack has three or four cells in series, giving a total voltage of 12.6V to 16.8V.

A requirement for safely charging Li-Ion batteries is accurate charge current control. The actual charge current depends on the number of cells in parallel within the battery pack. Typically, this is in the range of 2A to 3A. The ADP3806 provides flexibility in programming the charge current over a wide range. An external resistor senses the charge current and the resulting voltage is compared with a dc input voltage. This programmability allows the current to be changed during charging. For example, the charge current can be reduced for trickle charging.

The synchronous driver provides high efficiency when charging at high currents. Efficiency is important to reduce the amount of heat generated in the charger and to stay within the power limits of the ac adapter. With the addition of a bootstrapped high side driver, the ADP3806 drives two external power NMOS transistors for a simple, lower cost power stage.

The ADP3806 provides an uncommitted current sense amplifier. This amplifier provides an analog output pin for monitoring the current through an external sense resistor. The amplifier can be used anywhere in the system needing high-side current sensing.

Differential AMP1 in Fig. 1, on page 52, amplifies the voltage drop across the external sense resistor (RCS). Its input common mode range is from ground to VCC, allowing current control in short circuit and low dropout conditions. The gain of AMP1 is internally set to 25V/V for low voltage drop across the sense resistor. During the CC mode, amplifier gm1 forces the voltage at the output of AMP1 to be equal to the external voltage at the ISET pin. By choosing RCS and VISET appropriately, you can program a wide range of charge currents.

Typical values of RCS are from 25 mΩ to 50 mΩ, and the input range of ISET is from 0V to 4V. If, for example, you need a 3A charger, RCS could be set to 40mΩ and VISET=3V. The power dissipation in RCS should be kept below 500mW. In this example, the power is a maximum of 360mW. Once RCS has been chosen, you can adjust the charge current during operation with VISET. Lowering VISET to 125mV gives a charge current of 125mA for trickle charging. Components R3, R4, and C13 provide high-frequency filtering for the current sense signal.

As the battery approaches its final voltage, the ADP3806 switches from CC mode to CV mode. The change is achieved by the common output node of gm1 and gm2. Only one of the two outputs controls the voltage at the COMP pin. Both amplifiers can only pull down on COMP, such that when either amplifier has a positive differential input voltage, its output isn't active. For example, when the battery voltage, VBAT, is low, gm2 doesn't control VCOMP. When the battery voltage reaches the desired final voltage, gm2 takes control of the loop, reducing the charge current.

Amplifier gm2 compares the battery voltage with the 2.5V internal reference. For the ADP3806-12.5 and ADP3806-12.6, an internal resistor divider sets the final battery voltage.

When BATSEL is high, the final battery voltage is set to three cells (12.6V or 12.525V). It can be tied to REG for this state. With BATSEL connected to ground, VBAT equals four cells (16.8V or 16.7V). BATSEL has a 2μA pull-up current as a fail-safe to select three cells when it is left open.

The ADP3806 requires external, precision resistors. The divider ratio should be set to divide the desired final voltage down to 2.5V at the BAT pin. To minimize bias current errors, these resistors should have a parallel impedance of approximately 80 kΩ. When the ADP3806 is in shutdown, an internal switch disconnects the BAT pin. This disconnects the resistor, R11 from the battery and minimizes leakage. The resistance of the internal switch is less than 200Ω.

The reference and internal resistor divider are referenced to the AGND pin, which should be connected close to the negative terminal of the battery to minimize sensing errors.

Synchronous Step-Down Regulator

Linear Technology's LTC1879 is a high-efficiency monolithic synchronous buck regulator in a 16-lead SSOP package capable of providing 1.2A output. The output voltage is from 0.8V to the input supply voltage range of 2.65V to 10V, which makes it ideally suited for both single and dual Li-Ion battery-powered applications. Extending battery life in portable systems, 100% duty cycle provides low dropout operation. Its internal synchronous rectifier switch increases efficiency and eliminates the need for an external Schottky diode.

Switching frequency is internally set to 550 kHz, allowing the use of small surface mount inductors and capacitors. For noise sensitive applications, it can be externally synchronized from 350 kHz to 750 kHz.

It uses a constant frequency, current mode step-down architecture (Fig. 2). Both the top MOSFET and synchronous bottom MOSFET switches are internal, During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, lCOMP, resets the RS latch. The peak inductor current at which lCOMP turns the top MOSFET off is controlled by the voltage on the ITH pin, which is the output of error amplifier EA. When the load current increases, it causes a slight decrease in the feedback voltage, VFB, relative to the 0.8V internal reference, which, in turn, causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse direction or the next clock cycle begins. Comparator OVDET guards against transient overshoots >7.5% by turning the main switch off and keeping it off until the fault is removed.

The device is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply tie the SYNC/MODE Pin to SVIN or connect it to a logic high (VSYNC/MODE >1.5V). To disable Burst Mode operation and enable PWM pulse skipping mode, connect the SYNC/MODE pin to SGND. In this mode, the efficiency is lower at light loads but becomes comparable to Burst Mode operation when the output load exceeds 100mA. The advantage of pulse skipping mode is lower output ripple. Burst Mode operation is inhibited during synchronization or when the SYNC/MODE pin is pulled low.

When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 400mA — even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor's average current is greater than the load requirement. As the ITH voltage drops below approximately 0.45V, the BURST comparator trips, turning off both power MOSFETs. The ITH pin is then disconnected from the output of the EA amplifier and held 0.65V above ground.

In sleep mode, both power MOSFETs are held off and the internal circuitry is partially turned off, reducing the quiescent current to 15μA. The load current is now being supplied from the output capacitor. When the output voltage drops, the ITH pin reconnects to the output of the EA amplifier and the top MOSFET is again turned on and this process repeats.

The RUN/SS pin provides a soft-start function and a means to shut down the LTC1879. Soft-start reduces input current surge by gradually increasing the regulator's maximum output current. This pin can also be used for power supply sequencing.

Pulling the RUN/SS pin below 0.4V shuts down the LTC1879, which then draws <1μA current from the supply. This pin can be driven directly from logic circuits. It is recommended that this pin is driven to VIN during normal operation. Note there is no current flowing out of this pin. Soft-start action is accomplished by connecting an external RC network to the RUN/SS pin. The device actively pulls the RUN/SS pin to ground under low input supply voltage conditions.

The power good function monitors the output voltage in all modes of operation. Its open-drain output is pulled low when the output voltage is not within ±7.5% of its nominally regulated voltage. The feedback voltage is filtered before it's fed to a power good window comparator to prevent false tripping of the power good signal during fast transients. The window comparator monitors the output voltage even in Burst Mode operation. In shutdown mode, open drain is actively pulled low to indicate that the output voltage is invalid.

If the output shorts to ground the oscillator frequency reduces to about 80 kHz. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. The oscillator's frequency will progressively increase to 550 kHz (or to the synchronized frequency) when VFB rises above 0.3V.

The device can be synchronized to an external clock source connected to the SYNC/MODE pin. This causes the top MOSFET to synchronize to the rising edge of the external clock. When VFB is below 0.6V, it inhibits frequency synchronization, preventing the external clock from interfering with the frequency foldback and providing short-circuit protection.

Analog Devices, Norwood, Mass.
CIRCLE 346 on Reader Service Card

Linear Technology Corp., Milpitas, Calif.
CIRCLE 347 on Reader Service Card

About the Author

Sam Davis

Sam Davis was the editor-in-chief of Power Electronics Technology magazine and website that is now part of Electronic Design. He has 18 years experience in electronic engineering design and management, six years in public relations and 25 years as a trade press editor. He holds a BSEE from Case-Western Reserve University, and did graduate work at the same school and UCLA. Sam was the editor for PCIM, the predecessor to Power Electronics Technology, from 1984 to 2004. His engineering experience includes circuit and system design for Litton Systems, Bunker-Ramo, Rocketdyne, and Clevite Corporation.. Design tasks included analog circuits, display systems, power supplies, underwater ordnance systems, and test systems. He also served as a program manager for a Litton Systems Navy program.

Sam is the author of Computer Data Displays, a book published by Prentice-Hall in the U.S. and Japan in 1969. He is also a recipient of the Jesse Neal Award for trade press editorial excellence, and has one patent for naval ship construction that simplifies electronic system integration.

You can also check out his Power Electronics blog

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