Focus On Power-Efficient Design To Help Stop Global Warming

March 1, 2007
This year's One Powerful Issue takes on special significance given the widespread worries about global warming. With last month's unsettling report from the Intergovernmental Panel on Climate Change, energy efficiency is now sizzling on everybody's fr

This year's One Powerful Issue takes on special significance given the widespread worries about global warming. With last month's unsettling report from the Intergovernmental Panel on Climate Change, energy efficiency is now sizzling on everybody's front burner. Instead of cleaning up wasted energy via ever more elaborate cooling schemes, engineers are now thinking about power efficiency as one of the first tenets of good design.

Power efficiency was one of the central themes at last month's DesignCon conference in Santa Clara, Calif. Paul Platt, IDT's vice president of design service, told a panel audience that "power is now the top issue in design, and not just for the low-power guys working on portable products. Power bills and cooling costs are going through the roof at server farms."

Too often, manufacturers conduct power analysis "after the fact," Platt said. And while today's design tools allow some power efficiency modeling "at the architecture level, designers are not really getting the help they need. The tools need to offer more guidance early in the process," he said.

THE INDUSTRY'S VIEW
Brendon Farly of Silicon and Software Systems agreed, adding that new consumer electronics are creating a power crunch when it comes to scaling and leakage problems. "The challenges for lower power have really taken the industry by surprise," said Farly, citing the leakage issues at 130- and 90-nm process nodes. Design methodology must be adjusted to solve these problems, he said.

Steve Carlson, Cadence's vice president of product marketing, agreed that power is today's crucial issue, noting that designers are even "dusting off" water cooling as a solution to overheated networking systems. He said that front-end/chip designers have had a "hall pass" when it comes to power issues, but it's time for that to change.

Chip designers have tended to overdesign the margin for timing closure, he said, which has an impact on power and die size. "I'm going around challenging designers on the over-constraining of clocks. It's time for evolution to a more directed approach to determine the margin needed," he said.

Leakage analysis often is applied across the entire design using a worst-case scenario, when the reality is that 10% of the transistors are causing 90% of the leakage. It's understandable that designers want to include a safe margin of error, but Carlson said that new tools allow designers to see the tradeoffs earlier and make more informed design choices.

The hitch, said Carlson, is that learning to use the new tools takes time, while designers are under constant pressure to get their designs out the door. He called engineers "agents of change," but he said they need support from their managers to allow the time to adopt new technologies—and get the best return on investment. Designers are understandably conservative in an era where mask sets cost millions and "nobody has a problem as long as the schedule stays the same," he said.

OUR VIEW
To explore some of the new power-optimizing design tools, see our Engineering Feature, "We Have Seen The Enemy, And The Enemy Is Heat" by EDA Editor David Maliniak. Moving up the design chain, our One Powerful Issue includes all of our regular departments, but with unique angles on power efficiency.

Our Leapfrog articles describe SMSC's temperature sensors and fan controllers that help "beat the heat" and also Intel's breakthrough high-k solution for leakage power. Contributing Editor Sam Davis breaks down power management subsystem design in this issue's Engineering Essentials . Zooming out to the macro side of the power continuum, Analog/Power Editor Don Tuite investigates electricity metering in his Technology Report .

Don reminds us that power design is part of an energy ecosystem—every milliwatt of efficiency designed in at the chip level is a milliwatt of power conserved when the meter is rolling. Global energy use and electronic design are part of the same power continuum. The further back in the chain we can design in power efficiency, the less "cleanup" we'll have to do later.

There is still skepticism among some engineers as to the reality of global warming. But from an electronic design perspective, aiming for maximum power efficiency is a win/win equation. As consumer demand and government policy focus more on conservation, green products and their designers will ride a rising tide, leaving low-efficiency "power hogs" in their wake.

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