As ICs increase in signal density and pin count, so do the probe cards used to test them. This crowding of signals typically reduces the isolation between them, demanding that the probe-card leakage performance receive more attention for many applications. For the PCB on which your probes mount, layout and fabrication materials can directly affect its leakage performance and, subsequently, the overall integrity of your test.
Leakage Mechanisms
One type of leakage on your probe card occurs between adjacent features, such as signal conductors, traces, vias or planes, on the top or bottom surface of the PCB. This leakage path will generally be through the solder mask and reinforcement materials as illustrated in Figure 1a.
Leakage can also occur between inner-layer features. Inner-layer leakage current flows through the epoxy, holding the reinforcement layers together as well as the reinforcement material (Figure 1b). Leakage also can occur between layers, in which case the reinforcement will carry most of the leakage current.
With these leakage mechanisms in mind, custom test boards were fabricated to allow each mechanism to be measured for a variety of common probe-card PCB materials. For this experiment, two types of reinforcement, Polyimide and FR4, and three types of solder mask, liquid photoimigable (LPI), wet screenable or liquid and dry film, were used.
Table 1 shows how these materials were combined to produce seven test boards. All conductive features for the boards were made using 0.5-oz copper foil with nickel and gold plating, yielding a total feature thickness of about 20 m m.
Remember that the physical characteristics, such as volume resistivities and
feature dimensions, of the boards have natural, manufacturer and lot-dependent variations. Consequently, the results reflect general estimates of the performance of your probe card.
Measurement Setup
The leakage performance of the test boards was determined indirectly by measuring isolation resistances with an ultra-high resistance meter. Characterization in terms of resistance was chosen to allow translation of the results to various application voltages.
Such translations are only approximate since resistance of dielectric materials is not necessarily linear. For such high-resistance measurements, there also are several precautions to consider. For example, to reduce the voltage burden of the ammeter
resistance and to improve noise immunity, a test voltage of 100 V was used. To eliminate measurement variations due to dielectric absorption, a test voltage charge or wait time of 35 s was used.
As a precaution against various noise sources, each measurement was averaged eight times over 10 power-line cycles. The shielded triaxial test cables from the meter to the PCB test structures also were in a fixed and isolated position using custom test-lead stands to improve measurement repeatability.1,2
Measurement Results
Table 2 shows a typical sample of data taken from the test boards. The units used are TW /cm (1 x 1012 W /cm) of conductor or trace length, and PW /mm2 (1 x 1015 W /mm2) of conductor area. This small subset of data illustrates the relative performance of the different materials. The data, while typical of relative performance, does not describe the entire range of performance.
If leakage between surface features is your concern, all data collected revealed that minimum feature separation, such as 150 m m, will provide surface-isolation resistances in the range of 12 to 47 TW /cm. Again, this type of resistance was typically nonlinear, but you could translate this isolation to an estimated maximum leakage of 0.1 to 0.4 pA/cm for a 5-V system.
This leakage could double, for example, if a 5-V signal trace runs between two ground traces, as it often does for crosstalk reduction. Although the isolation resistances generally increased with feature-separation distance, the relationship was not very linear.
Such behavior indicates the resistance has a dependence on the integrity and resistivity of the interface between the solder mask and the conductor or reinforcement. Fabrication uncertainties, resulting in profile or separation variations and other material nonuniformities, also contribute to a nonlinear characteristic.
Although all solder-mask materials behaved similarly, the LPI solder mask on top of the Polyimide reinforcement appeared superior, exhibiting isolation resistances on average 2.5 times higher than the next best combination. Boards without solder mask, referred to as bare in Table 2, had significantly higher isolation. This indicated that the bulk of the surface leakage flowed through the solder mask and the interface between the solder mask and reinforcement. These high-isolation resistances, while notable, were not measured extensively, since this examination focused on the characterization of solder-mask materials.
Inner-layer isolation resistances of minimally separated features, such as 150 m m, were in the range of 0.8 to 3 TW /cm, yielding leakages of approximately 1 to 6 pA/cm for a 5-V system. The resulting leakage was about an order of magnitude worse than surface leakage due to the inferior isolation of the epoxy at the reinforcement interface.
Although the Polyimide boards had higher isolation resistances than those made with FR4, the results were of the same order of magnitude. This pointed to a strong dependence on the conductivity of the epoxy used to attach the layers. As opposed to surface-resistance measurements, the inner-layer resistances showed a more linear improvement with separation distance, as shown for the Polyimide/bare-board example in Figure 2.
Leakage through the reinforcement material was low compared to the other leakage paths. Measurements showed an average isolation per unit area from a top feature to the closest inner-layer feature to be about 27 PW /mm2 for Polyimide and 11 PW /mm2 for FR4. For a 0.25 x 200 mm line, this translated into a current leakage of 8 fA and 23 fA, respectively. So unless you have highly sensitive large-geometry features, leakage through the reinforcement can usually be neglected.
Design Tips
Based on these results, here are a few tips to consider when designing probe card PCBs for low-leakage applications:
Keep leakage-sensitive signals on the top or bottom surfaces.
Use 1-mm or greater surface-feature separation to hold surface leakages below 0.1 pA/cm of the trace length; that is, for systems less than 20 V.
Grounded traces between signal traces may reduce crosstalk, but may increase leakage.
When possible, obtain maximum surface isolation by not covering sensitive signal traces with solder mask.
If sensitive signals must run through inner layers, use a maximum possible separation between the signal and other inner-layer features.
Layer-to-layer leakage can be neglected except for large-geometry, ultrasensitive signal traces.
If the materials discussed here are inadequate for your application, References 1 and 2 provide information on additional materials and techniques for designing low-leakage systems.
References
1. Low-Level Measurements, Keithley Instruments, Cleveland, OH, 1993.
2. “Test Technique Note G9: Testing Low Current Devices on A580/A530AL Test Systems,” A500 Family of Test Systems Test Technique Notes, Teradyne, Boston, MA, 1995.
Acknowledgments
The authors thank Bob Smilo and Joe Brown of Probe Technology and Barry Labonte of Teradyne for their valuable contribution to this work.
About the Authors
Daniel T. Hamling is a Field Product Specialist for Teradyne’s A500 family of mixed-signal test systems. Before joining Teradyne, he worked for GEC Plessey Semiconductors and Hewlett-Packard as Test Engineering Manager and Staff Test Engineer, respectively. Mr. Hamling received a B.S.E.E. degree from the University of Michigan and an M.S.E.E. degree from Stanford University. Teradyne, 4544 S. Lamar Blvd., Building 300, Austin, TX 78745, (512) 891-9600.
January Kister is Chief Technical Officer at Probe Technology. He is a graduate of the Polytechnic Institute of Silesia, Poland, and the University of Michigan with an M.S.M.E. degree. Probe Technology, 2424 Walsh Ave., Santa Clara, CA 95051, (408) 980-1740.
Table 1.
Solder Mask
Reinforcement
1 Bare
2 LPI
Polyimide
3 Liquid
4 Bare
5 LPI
FR4
6 Liquid
7 Dry Film
Table 2.
Test Board
Leakage Type and Sample Separation Distance
Surface
500 m m
Inner-Layer
1,400 m m
Layer-to-Layer
125 m m
Polyimide/Bare
—
5.33
47.0
Polyimide/LPI
92.8
5.84
16.3
Polyimide/Liquid
12.6
9.03
15.3
FR4/Bare
—
1.39
4.65
FR4/LPI
21.9
3.92
4.97
FR4/Liquid
16.5
1.45
15.9
FR4/Dry Film
23.6
1.84
24.0
TW /cm
TW /cm
PW /mm2
Copyright 1996 Nelson Publishing Inc.
December 1996
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